Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31902 )
Change subject: soc/intel/cannonlake: Clear SUS_PWR_FLR status bit
......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/#/c/31902/3/src/soc/intel/cannonlake/pmutil.c
File src/soc/intel/cannonlake/pmutil.c:
https://review.coreboot.org/#/c/31902/3/src/soc/intel/cannonlake/pmutil.c@14...
PS3, Line 146: pmc_clear_suspwrflr
makes sense, If FSP is relying on these values we have to make we clear these after FSP is done init […]
the appropriate place would be pch_finalize(), by that point FSP notify is also done.
--
To view, visit
https://review.coreboot.org/c/coreboot/+/31902
To unsubscribe, or for help writing mail filters, visit
https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If9863d52ed3c61b6a160df53f023b0787eaaed68
Gerrit-Change-Number: 31902
Gerrit-PatchSet: 3
Gerrit-Owner: Krishna P Bhat D
krishna.p.bhat.d@intel.com
Gerrit-Reviewer: Aamir Bohra
aamir.bohra@intel.com
Gerrit-Reviewer: Balaji Manigandan
balaji.manigandan@intel.com
Gerrit-Reviewer: Furquan Shaikh
furquan@google.com
Gerrit-Reviewer: Krishna P Bhat D
krishna.p.bhat.d@intel.com
Gerrit-Reviewer: Patrick Rudolph
siro@das-labor.org
Gerrit-Reviewer: Rizwan Qureshi
rizwan.qureshi@intel.com
Gerrit-Reviewer: Subrata Banik
subrata.banik@intel.com
Gerrit-Reviewer: build bot (Jenkins)
no-reply@coreboot.org
Gerrit-Comment-Date: Mon, 18 Mar 2019 05:23:36 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Rizwan Qureshi
rizwan.qureshi@intel.com
Comment-In-Reply-To: Furquan Shaikh
furquan@google.com
Gerrit-MessageType: comment