[coreboot-gerrit] [S] Change in coreboot[main]: soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls

[Nick Kochlowski (Code Review)]

Attention is currently required from: Ana Carolina Cabral, Fred Reitberger, Jason Glenesk, Matt DeVillier, Matt DeVillier, Nick Kochlowski.

Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Matt DeVillier, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/84915?usp=email

to look at the new patch set (#7).

The following approvals got outdated and were removed:
Code-Review+1 by Matt DeVillier, Verified+1 by build bot (Jenkins)

Change subject: soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls
......................................................................

soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls

Call OpenSIL timepoint 2 for further initialization of AMD SoC after
coreboot has performed PCIe enumeration, and timepoint 3 for late SoC
IPs programming and register locking closer to payload load prior to OS
handoff.

Change-Id: I8c335211bf36118fe1d6b7dacbf4064c1d7d3a38
Signed-off-by: Nicolas Kochlowski 
---
M src/soc/amd/phoenix/Kconfig
M src/soc/amd/phoenix/chip.c
2 files changed, 42 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/84915/7