[coreboot-gerrit] Change in coreboot[master]: soc/common: Program SF Mask MSRs for eNEM

[Shreesh Chhabbi (Code Review)]

Hello build bot (Jenkins), Mariusz Szafrański, Suresh Bellampalli, Vanessa Eusebio, Michal Motyl, Patrick Rudolph, Shreesh Chhabbi,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/47983

to look at the new patch set (#3).

Change subject: soc/common: Program SF Mask MSRs for eNEM
......................................................................

soc/common: Program SF Mask MSRs for eNEM

Due to non-inclusive cache architecture in TGL, MSRs
IA32_L3_SF_MASK_1 (1891h) and IA32_L3_SF_MASK_2 (1892h)
need to be programmed. Recommendation is to set bits
corresponding to all ways to 1b.

Bug=b:171601324
BRANCH=volteer
Test=<Yet to run>

Signed-off-by: Shreesh Chhabbi 
Change-Id: I5781008a1447813317878a722cb894edcd6df946
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/common/block/cpu/Kconfig
M src/soc/intel/common/block/cpu/car/cache_as_ram.S
M src/soc/intel/denverton_ns/Kconfig
M src/soc/intel/icelake/Kconfig
M src/soc/intel/jasperlake/Kconfig
M src/soc/intel/skylake/Kconfig
M src/soc/intel/tigerlake/Kconfig
8 files changed, 37 insertions(+), 31 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/47983/3