[coreboot-gerrit] [S] Change in coreboot[master]: arch/x86: Ensure LAPIC mode for exception handler

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76194?usp=email )

Change subject: arch/x86: Ensure LAPIC mode for exception handler
......................................................................

arch/x86: Ensure LAPIC mode for exception handler

Attempting to use X2APIC MSRs before the call to enable_lapic()
is made raises exception and double-faults.

Change-Id: Ib97889466af0fbe639bec2be730784acc015b525
Signed-off-by: Kyösti Mälkki 
---
M src/arch/x86/exception.c
M src/include/cpu/x86/lapic.h
2 files changed, 14 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/76194/1

diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c
index 5f6c0fc..e9234ad 100644
--- a/src/arch/x86/exception.c
+++ b/src/arch/x86/exception.c
@@ -488,7 +488,6 @@
 #else /* !CONFIG_GDB_STUB */

int logical_processor = 0;
-	u32 apic_id = CONFIG(SMP) ? lapicid() : 0;

if (info->vector == DEBUG_VECTOR) {
    	if (breakpoint_dispatch_handler(info) == 0)
@@ -513,7 +512,7 @@
    	"r10: %016llx r11: %016llx\n"
    	"r12: %016llx r13: %016llx\n"
    	"r14: %016llx r15: %016llx\n",
-		logical_processor, apic_id,
+		logical_processor, early_lapicid(),
    	info->vector, info->cs, info->rip,
    	info->error_code, info->rflags, read_cr2(),
    	info->rax, info->rbx, info->rcx, info->rdx,
@@ -530,7 +529,7 @@
    	"Code: %d eflags: %08x cr2: %08x\n"
    	"eax: %08x ebx: %08x ecx: %08x edx: %08x\n"
    	"edi: %08x esi: %08x ebp: %08x esp: %08x\n",
-		logical_processor, apic_id,
+		logical_processor, early_lapicid(),
    	info->vector, info->cs, info->eip,
    	info->error_code, info->eflags, read_cr2(),
    	info->eax, info->ebx, info->ecx, info->edx,
diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h
index f7fecf1..87cf3c7 100644
--- a/src/include/cpu/x86/lapic.h
+++ b/src/include/cpu/x86/lapic.h
@@ -184,4 +184,16 @@
 void disable_lapic(void);
 void setup_lapic_interrupts(void);

+static inline unsigned int early_lapicid(void)
+{
+	if (!CONFIG(SMP))
+		return 0;
+
+	if (!ENV_RAMSTAGE)
+		return 0;
+
+	enable_lapic();
+	return lapicid();
+}
+
 #endif /* CPU_X86_LAPIC_H */