[coreboot-gerrit] Patch merged into coreboot/master: d4d6a40 armv7: invalidate TLB after changing translation table entries

the following patch was just integrated into master:
commit d4d6a407f74e241c0d00c2eeac2fb85e7f08f989
Author: David Hendricks 
Date:   Thu Mar 28 18:28:30 2013 -0700

armv7: invalidate TLB after changing translation table entries

This adds a call to tlb_invalidate_all() after configuring a range
    of memory.

Change-Id: I558402e7e54b6bf9e0b013f153d9b84c0873a6cf
    Signed-off-by: David Hendricks 
    Reviewed-on: http://review.coreboot.org/2946
    Reviewed-by: Ronald G. Minnich 
    Tested-by: build bot (Jenkins)

Build-Tested: build bot (Jenkins) at Fri Mar 29 03:46:32 2013, giving +1
See http://review.coreboot.org/2946 for details.

-gerrit