Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35766 )
Change subject: mediatek/mt8183: Pass impedance data as a function argument ......................................................................
mediatek/mt8183: Pass impedance data as a function argument
To make data flow more explicit, global variable 'impedance' is replaced with a local variable, which is passed as a function argument.
BUG=none BRANCH=none TEST=Krane boots correctly
Change-Id: I0f6dacc33fda013a3476a10d9899821b7297e770 Signed-off-by: Yu-Ping Wu yupingso@chromium.org --- M src/soc/mediatek/mt8183/dramc_init_setting.c M src/soc/mediatek/mt8183/dramc_pi_basic_api.c M src/soc/mediatek/mt8183/emi.c M src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h M src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h M src/soc/mediatek/mt8183/include/soc/emi.h 6 files changed, 38 insertions(+), 34 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/35766/1
diff --git a/src/soc/mediatek/mt8183/dramc_init_setting.c b/src/soc/mediatek/mt8183/dramc_init_setting.c index b8491d3..5fe9392 100644 --- a/src/soc/mediatek/mt8183/dramc_init_setting.c +++ b/src/soc/mediatek/mt8183/dramc_init_setting.c @@ -948,7 +948,8 @@ clrsetbits_le32(&ch[0].ao.shu[0].selph_dqs1, 0x77777777, SELPH_DQS1_3600); }
-static void dramc_setting(const struct sdram_params *params, u8 freq_group) +static void dramc_setting(const struct sdram_params *params, u8 freq_group, + struct dram_impedance *impedance) { u8 chn;
@@ -1381,11 +1382,10 @@ default: die("Invalid DDR frequency group %u\n", freq_group); return; - break; }
update_initial_settings(freq_group); - dramc_sw_impedance_save_reg(freq_group); + dramc_sw_impedance_save_reg(freq_group, impedance);
clrbits_le32(&ch[0].ao.test2_4, 0x1 << 17); clrsetbits_le32(&ch[0].ao.shu[0].conf[3], 0x1ff << 0, 0x5 << 0); @@ -1711,9 +1711,10 @@ clrsetbits_le32(&ch[0].ao.arbctl, 0x1 << 13, dram_cbt_mode); }
-void dramc_init(const struct sdram_params *params, u8 freq_group) +void dramc_init(const struct sdram_params *params, u8 freq_group, + struct dram_impedance *impedance) { - dramc_setting(params, freq_group); + dramc_setting(params, freq_group, impedance);
dramc_duty_calibration(params, freq_group);
diff --git a/src/soc/mediatek/mt8183/dramc_pi_basic_api.c b/src/soc/mediatek/mt8183/dramc_pi_basic_api.c index a194d7a..eebd7f7 100644 --- a/src/soc/mediatek/mt8183/dramc_pi_basic_api.c +++ b/src/soc/mediatek/mt8183/dramc_pi_basic_api.c @@ -20,8 +20,6 @@ #include <soc/dramc_register.h> #include <soc/dramc_pi_api.h>
-static u32 impedance[2][4]; - u8 get_freq_fsq(u8 freq) { if (freq == LP4X_DDR1600 || freq == LP4X_DDR2400) @@ -53,7 +51,8 @@ clrsetbits_le32(&ch[0].phy.shu[0].ca_cmd[11], 0x3f << 8, vref_sel << 8); }
-void dramc_sw_impedance_cal(const struct sdram_params *params, u8 term) +void dramc_sw_impedance_cal(const struct sdram_params *params, u8 term, + struct dram_impedance *impedance) { u32 broadcast_bak, impcal_bak, imp_cal_result; u32 DRVP_result = 0xff, ODTN_result = 0xff, DRVN_result = 0x9; @@ -131,26 +130,25 @@
dramc_show("term:%d, DRVP=%d, DRVN=%d, ODTN=%d\n", term, DRVP_result, DRVN_result, ODTN_result); + u32 *imp = impedance->data[term]; if (term == ODT_OFF) { - impedance[term][0] = DRVP_result; - impedance[term][1] = ODTN_result; - impedance[term][2] = 0; - impedance[term][3] = 15; + imp[0] = DRVP_result; + imp[1] = ODTN_result; + imp[2] = 0; + imp[3] = 15; } else { - impedance[term][0] = (DRVP_result <= 3) ? - (DRVP_result * 3) : DRVP_result; - impedance[term][1] = (DRVN_result <= 3) ? - (DRVN_result * 3) : DRVN_result; - impedance[term][2] = 0; - impedance[term][3] = (ODTN_result <= 3) ? - (ODTN_result * 3) : ODTN_result; + imp[0] = (DRVP_result <= 3) ? (DRVP_result * 3) : DRVP_result; + imp[1] = (DRVN_result <= 3) ? (DRVN_result * 3) : DRVN_result; + imp[2] = 0; + imp[3] = (ODTN_result <= 3) ? (ODTN_result * 3) : ODTN_result; } dramc_sw_imp_cal_vref_sel(term, IMPCAL_STAGE_TRACKING);
dramc_set_broadcast(broadcast_bak); }
-void dramc_sw_impedance_save_reg(u8 freq_group) +void dramc_sw_impedance_save_reg(u8 freq_group, + struct dram_impedance *impedance) { u8 ca_term = ODT_OFF, dq_term = ODT_ON; u32 sw_impedance[2][4] = {0}; @@ -160,7 +158,7 @@
for (u8 term = 0; term < 2; term++) for (u8 i = 0; i < 4; i++) - sw_impedance[term][i] = impedance[term][i]; + sw_impedance[term][i] = impedance->data[term][i];
sw_impedance[ODT_OFF][2] = sw_impedance[ODT_ON][2]; sw_impedance[ODT_OFF][3] = sw_impedance[ODT_ON][3]; diff --git a/src/soc/mediatek/mt8183/emi.c b/src/soc/mediatek/mt8183/emi.c index 8bd8a39..d967a3d 100644 --- a/src/soc/mediatek/mt8183/emi.c +++ b/src/soc/mediatek/mt8183/emi.c @@ -312,23 +312,20 @@ } }
-static void dfs_init_for_calibration(const struct sdram_params *params, u8 freq_group) -{ - dramc_init(params, freq_group); - dramc_apply_config_before_calibration(freq_group); -} - static void init_dram(const struct sdram_params *params, u8 freq_group) { + struct dram_impedance impedance; + global_option_init(params); emi_init(params);
dramc_set_broadcast(DRAMC_BROADCAST_ON); dramc_init_pre_settings(); - dramc_sw_impedance_cal(params, ODT_OFF); - dramc_sw_impedance_cal(params, ODT_ON); + dramc_sw_impedance_cal(params, ODT_OFF, &impedance); + dramc_sw_impedance_cal(params, ODT_ON, &impedance);
- dfs_init_for_calibration(params, freq_group); + dramc_init(params, freq_group, &impedance); + dramc_apply_config_before_calibration(freq_group); emi_init2(params); }
diff --git a/src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h b/src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h index ef6eaf1..5ea9a52 100644 --- a/src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h +++ b/src/soc/mediatek/mt8183/include/soc/dramc_common_mt8183.h @@ -37,7 +37,8 @@
enum dram_odt_type { ODT_OFF = 0, - ODT_ON + ODT_ON, + ODT_MAX };
enum { diff --git a/src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h b/src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h index 1ce5f67..afbaba0 100644 --- a/src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h +++ b/src/soc/mediatek/mt8183/include/soc/dramc_pi_api.h @@ -105,9 +105,12 @@ void dramc_set_broadcast(u32 onoff); u32 dramc_get_broadcast(void); u8 get_freq_fsq(u8 freq_group); -void dramc_init(const struct sdram_params *params, u8 freq_group); -void dramc_sw_impedance_save_reg(u8 freq_group); -void dramc_sw_impedance_cal(const struct sdram_params *params, u8 term_option); +void dramc_init(const struct sdram_params *params, u8 freq_group, + struct dram_impedance *impedance); +void dramc_sw_impedance_save_reg(u8 freq_group, + struct dram_impedance *impedance); +void dramc_sw_impedance_cal(const struct sdram_params *params, u8 term_option, + struct dram_impedance *impedance); void dramc_apply_config_before_calibration(u8 freq_group); void dramc_apply_config_after_calibration(void); void dramc_calibrate_all_channels(const struct sdram_params *pams, diff --git a/src/soc/mediatek/mt8183/include/soc/emi.h b/src/soc/mediatek/mt8183/include/soc/emi.h index 264d918..86821e2 100644 --- a/src/soc/mediatek/mt8183/include/soc/emi.h +++ b/src/soc/mediatek/mt8183/include/soc/emi.h @@ -41,6 +41,10 @@ LP4X_DDRFREQ_MAX, };
+struct dram_impedance { + u32 data[ODT_MAX][4]; +}; + extern const u8 phy_mapping[CHANNEL_MAX][16];
int complex_mem_test(u8 *start, unsigned int len);