[coreboot-gerrit] Change in coreboot[master]: soc/intel/skylake: Use PEG defintions from pci_devs.h

[Felix Singer (Code Review)]

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44367 )

Change subject: soc/intel/skylake: Use PEG defintions from pci_devs.h
......................................................................

soc/intel/skylake: Use PEG defintions from pci_devs.h

Change-Id: I7114deed35f25e74ac508f08e9c85653a7fe39ed
Signed-off-by: Felix Singer 
---
M src/soc/intel/skylake/romstage/romstage.c
1 file changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/44367/1

diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 5d651ca..7410925 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -170,7 +170,7 @@
     * If PEG port is not defined in the device tree, it will be disabled
     * in FSP
     */
-	dev = pcidev_on_root(SA_DEV_SLOT_PEG, 0); /* PEG 0:1:0 */
+	dev = pcidev_path_on_root(SA_DEVFN_PEG0); /* PEG 0:1:0 */
    if (!dev || !dev->enabled)
    	m_cfg->Peg0Enable = 0;
    else if (dev->enabled) {
@@ -185,7 +185,7 @@
    	m_t_cfg->Peg0Gen3EqPh3Method = 0;
    }

-	dev = pcidev_on_root(SA_DEV_SLOT_PEG, 1); /* PEG 0:1:1 */
+	dev = pcidev_path_on_root(SA_DEVFN_PEG1); /* PEG 0:1:1 */
    if (!dev || !dev->enabled)
    	m_cfg->Peg1Enable = 0;
    else if (dev->enabled) {
@@ -197,7 +197,7 @@
    	m_t_cfg->Peg1Gen3EqPh3Method = 0;
    }

-	dev = pcidev_on_root(SA_DEV_SLOT_PEG, 2); /* PEG 0:1:2 */
+	dev = pcidev_path_on_root(SA_DEVFN_PEG2); /* PEG 0:1:2 */
    if (!dev || !dev->enabled)
    	m_cfg->Peg2Enable = 0;
    else if (dev->enabled) {