[coreboot-gerrit] Patch merged into coreboot/master: ec5e5e0 New mechanism to define SRAM/memory map with automatic bounds checking

the following patch was just integrated into master:
commit ec5e5e0db2ac923a4f80d24ffa7582c3b821d971
Author: Julius Werner 
Date:   Wed Aug 20 15:29:56 2014 -0700

New mechanism to define SRAM/memory map with automatic bounds checking

This patch creates a new mechanism to define the static memory layout
    (primarily in SRAM) for a given board, superseding the brittle mass of
    Kconfigs that we were using before. The core part is a memlayout.ld file
    in the mainboard directory (although boards are expected to just include
    the SoC default in most cases), which is the primary linker script for
    all stages (though not rmodules for now). It uses preprocessor macros
    from <memlayout.h> to form a different valid linker script for all
    stages while looking like a declarative, boilerplate-free map of memory
    addresses to the programmer. Linker asserts will automatically guarantee
    that the defined regions cannot overlap. Stages are defined with a
    maximum size that will be enforced by the linker. The file serves to
    both define and document the memory layout, so that the documentation
    cannot go missing or out of date.

The mechanism is implemented for all boards in the ARM, ARM64 and MIPS
    architectures, and should be extended onto all systems using SRAM in the
    future. The CAR/XIP environment on x86 has very different requirements
    and the layout is generally not as static, so it will stay like it is
    and be unaffected by this patch (save for aligning some symbol names for
    consistency and sharing the new common ramstage linker script include).

BUG=None
    TEST=Booted normally and in recovery mode, checked suspend/resume and
    the CBMEM console on Falco, Blaze (both normal and vboot2), Pinky and
    Pit. Compiled Ryu, Storm and Urara, manually compared the disassemblies
    with ToT and looked for red flags.

Change-Id: Ifd2276417f2036cbe9c056f17e42f051bcd20e81
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: f1e2028e7ebceeb2d71ff366150a37564595e614
    Original-Change-Id: I005506add4e8fcdb74db6d5e6cb2d4cb1bd3cda5
    Original-Signed-off-by: Julius Werner 
    Original-Reviewed-on: https://chromium-review.googlesource.com/213370
    Reviewed-on: http://review.coreboot.org/9283
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Tauner 
    Reviewed-by: Aaron Durbin

See http://review.coreboot.org/9283 for details.

-gerrit