Wonkyu Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75714?usp=email )
Change subject: [TEST ONLY] add VPRO features control by fw config ......................................................................
[TEST ONLY] add VPRO features control by fw config
Define keylocker, tme fw_config bits(24-25) field KEYLOCKER 24 option KEYLOCKER_EN 0 option KEYLOCKER_DIS 1 end field TME 25 option TME_EN 0 option TME_DIS 1 end
Vpro features Disable: 3XXXXXX (XXXXXX is existing fw_config value) Vpro features Enable : XXXXXX (XXXXXX is existing fw_config value)
ex)proto1 SKU1 fw_config: 0x1561 0x1561 => Vpro features(keylocker/tme) are enabled 0x3001561 => Vpro features(keylocker/tme) are disabled
localhost ~ # cbmem -c | grep fw_config ... [DEBUG] keylocker is disabled by fw_config ... [DEBUG] TME is disabled by fw config
How to read FW config From EC console, type "cbi" to read FW config ex) 23-05-17 23:33:33.229 ec:~$ cbi ... 23-05-17 23:41:33.248 FW_CONFIG: 5473 (0x1561) ...
How to write FW config From EC consone, type "cbi set 6 <FW config value> 4 ex) 23-05-17 23:43:42.320 ec:~$ cbi set 6 0x3001561 4
Signed-off-by: Wonkyu Kim wonkyu.kim@intel.com Change-Id: I746ba80279dc69d06ac9e06bfeae068e31d23694 --- M src/mainboard/google/rex/variants/rex0/Makefile.inc A src/mainboard/google/rex/variants/rex0/cpulib.c M src/mainboard/google/rex/variants/rex0/overridetree.cb M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h 5 files changed, 72 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/75714/1
diff --git a/src/mainboard/google/rex/variants/rex0/Makefile.inc b/src/mainboard/google/rex/variants/rex0/Makefile.inc index cdbf407..63a665c 100644 --- a/src/mainboard/google/rex/variants/rex0/Makefile.inc +++ b/src/mainboard/google/rex/variants/rex0/Makefile.inc @@ -3,3 +3,6 @@ ramstage-y += gpio.c ramstage-y += variant.c ramstage-$(CONFIG_FW_CONFIG) += fw_config.c +bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_CPU) += cpulib.c diff --git a/src/mainboard/google/rex/variants/rex0/cpulib.c b/src/mainboard/google/rex/variants/rex0/cpulib.c new file mode 100644 index 0000000..cf0edcd --- /dev/null +++ b/src/mainboard/google/rex/variants/rex0/cpulib.c @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <intelblocks/cpulib.h> +#include <fw_config.h> + +/* override function according to fw_config */ +bool is_tme_enabled(void) +{ + if(fw_config_probe(FW_CONFIG(TME, TME_DIS))) { + printk(BIOS_DEBUG, "TME is disabled by fw_config\n"); + return false; + } + return true; +} + +/* override function according to fw_config */ +bool is_keylocker_enabled(void) +{ + if(fw_config_probe(FW_CONFIG(KEYLOCKER, KEYLOCKER_DIS))) { + printk(BIOS_DEBUG, "keylocker is disabled by fw_config\n"); + return false; + } + return true; +} diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb index 4619cba..ca49696 100644 --- a/src/mainboard/google/rex/variants/rex0/overridetree.cb +++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb @@ -54,6 +54,14 @@ option ISH_DISABLE 0 option ISH_ENABLE 1 end + field KEYLOCKER 24 + option KEYLOCKER_EN 0 + option KEYLOCKER_DIS 1 + end + field TME 25 + option TME_EN 0 + option TME_DIS 1 + end end
chip soc/intel/meteorlake diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index c317e05..c29061f 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -405,9 +405,19 @@ return ((cpuid_regs.ecx & KEYLOCKER_SUPPORTED) && (msr.lo & MTRR_CAP_PRMRR)); }
+/* + * This weak function can be overried for early SOC testing purpose. + * The functions can be implemented with fw_config or menu + * to enable/disable the features. + */ +bool __weak is_keylocker_enabled(void) +{ + return true; +} + static bool is_keylocker_configured_and_supported(void) { - return CONFIG(INTEL_KEYLOCKER) && is_keylocker_supported(); + return CONFIG(INTEL_KEYLOCKER) && is_keylocker_supported() && is_keylocker_enabled(); }
static bool check_prm_features_enabled(void) @@ -485,13 +495,23 @@ sync_core_prmrr(); }
+/* + * This weak function can be overried for early SOC testing purpose. + * The functions can be implemented with fw_config or menu + * to enable/disable the features. + */ +bool __weak is_tme_enabled(void) +{ + return true; +} + bool is_tme_supported(void) { struct cpuid_result cpuid_regs;
/* ECX[13] is feature capability */ cpuid_regs = cpuid_ext(CPUID_STRUCT_EXTENDED_FEATURE_FLAGS, 0x0); - return (cpuid_regs.ecx & TME_SUPPORTED); + return (cpuid_regs.ecx & TME_SUPPORTED) && is_tme_enabled(); }
void set_tme_core_activate(void) diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index cbc9e44..f33b3f5 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -225,4 +225,18 @@ */ void disable_three_strike_error(void);
+/* + * This weak function can be overried for early SOC testing purpose. + * The functions can be implemented with fw_config or menu + * to enable/disable the features. + */ +bool is_tme_enabled(void); + +/* + * This weak function can be overried for early SOC testing purpose. + * The functions can be implemented with fw_config or menu + * to enable/disable the features. + */ +bool is_keylocker_enabled(void); + #endif /* SOC_INTEL_COMMON_BLOCK_CPULIB_H */