Patrick Georgi (pgeorgi@google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9525
-gerrit
commit a3ed49faf5b322aa63ebf726b0141fc184545229 Author: Aaron Durbin adurbin@chromium.org Date: Wed Nov 19 12:01:39 2014 -0600
tegra132: always bring up PLLD
The kernel does not correctly function without PLLD being enabled. Additionally, PLLD can be the source for other clocks in the system. Therefore, initialize PLLD to 300MHz unconditionally at BS_DEV_INIT time in ramstage.
BUG=chrome-os-partner:33825 BRANCH=None TEST=Built and booted ryu with display coming up both in dev mode as well as normal mode.
Change-Id: Ib2a60bb9aafc03dc23aa932a480184d87f677c65 Signed-off-by: Patrick Georgi pgeorgi@chromium.org Original-Commit-Id: 4c49f964b55c3c33d03b95363277b262b679e740 Original-Change-Id: Ic5905e25051a042cea5010b8c6d61b1fb89a0a81 Original-Signed-off-by: Aaron Durbin adurbin@chromium.org Original-Reviewed-on: https://chromium-review.googlesource.com/230774 Original-Reviewed-by: Tom Warren twarren@nvidia.com Original-Reviewed-by: Furquan Shaikh furquan@chromium.org Original-Tested-by: Sean Paul seanpaul@chromium.org --- src/soc/nvidia/tegra132/soc.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)
diff --git a/src/soc/nvidia/tegra132/soc.c b/src/soc/nvidia/tegra132/soc.c index d80a388..5593be7 100644 --- a/src/soc/nvidia/tegra132/soc.c +++ b/src/soc/nvidia/tegra132/soc.c @@ -22,6 +22,7 @@ #include <arch/cache.h> #include <arch/spintable.h> #include <cpu/cpu.h> +#include <bootstate.h> #include <cbmem.h> #include <console/console.h> #include <device/device.h> @@ -141,3 +142,20 @@ static const struct cpu_driver driver __cpu_driver = { .ops = &cpu_dev_ops, .id_table = ids, }; + +static void enable_plld(void *unused) +{ + /* + * Configure a conservative 300MHz clock for PLLD. The kernel cannot + * handle PLLD not being configured so enable PLLD unconditionally + * with a default clock rate. + */ + clock_configure_plld(300 * MHz); +} + +/* + * The PLLD being enabled is done at BS_DEV_INIT time because mainboard_init() + * is the first thing called. This ensures PLLD is up and functional before + * anything that mainboard can do that implicitly relies on PLLD. + */ +BOOT_STATE_INIT_ENTRY(BS_DEV_INIT, BS_ON_ENTRY, enable_plld, NULL);