[coreboot-gerrit] [S] Change in coreboot[master]: soc/amd: Add an optional unsigned section in PSP verstage

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held.

Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68135 )

Change subject: soc/amd: Add an optional unsigned section in PSP verstage
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Patch Set 9:

(1 comment)

File src/soc/amd/common/block/cpu/noncar/memlayout_psp_verstage.ld:

https://review.coreboot.org/c/coreboot/+/68135/comment/8e425ef3_a56f3a6a 
PS9, Line 25: ALIGN
> Doesn't this need to move up one line if you want the anchor to be aligned to 64 bytes?

PSP_FOOTER_DATA already takes care of it. It is already starting at address that is aligned to 64 bytes and is 64 bytes in size.

Hence the anchor is already starting at an address aligned to 64 bytes. This is to ensure that the entire binary is still aligned to 64 bytes after the anchor is introduced. Anchor currently is at size 0x8c. This alignment makes it to hit 0xc0.