[coreboot-gerrit] [M] Change in coreboot[master]: soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles

[EricKY Cheng (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Ian Feng, Matt DeVillier, Chris Wang, Tim Van Patten, Fred Reitberger, Karthikeyan Ramasubramanian, Felix Held.

EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68469 )

Change subject: soc/amd/mendocino: Expand extra 5 DPTC thermal related profiles
......................................................................

Patch Set 4:

(1 comment)

File src/soc/amd/mendocino/chip.h:

https://review.coreboot.org/c/coreboot/+/68469/comment/4430d80a_67fbbf3f 
PS4, Line 77: 	uint32_t sustained_power_limit_mW_B;
            : 	uint32_t fast_ppt_limit_mW_B;
            : 	uint32_t slow_ppt_limit_mW_B;
            : 	uint32_t slow_ppt_time_constant_s_B;
            : 	uint32_t thermctl_limit_degreeC_B;
> From the tables in b/248086651, how are you deciding which values need entries here? […]

1. OK, I will remove the same for everything items.

2. The items list here are for the thermal table expansion design in the future. 
2.1. Based on previous co-operation experience with thermal team on lock-down the tables in b/248086651, these parameters list here are probability changed in further tuning. 
2.2. There are some table parameters that I don't list here as you expect because based on previous co-operation experience with thermal team on lock-down the tables in b/248086651, thermal team did't request to change.