Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44498
to look at the new patch set (#2).
Change subject: nb/amd/agesa: define DDR3_SPD_SIZE as a common value ......................................................................
nb/amd/agesa: define DDR3_SPD_SIZE as a common value
Move a size of DDR3 SPD memory (always 256 bytes) to a common define.
Signed-off-by: Mike Banon mikebdp2@gmail.com Change-Id: I80c89ff6e44526e1d75b0e933b21801ed17c98c0 --- M src/northbridge/amd/agesa/family14/dimmSpd.c M src/northbridge/amd/agesa/family15tn/dimmSpd.c M src/northbridge/amd/agesa/family16kb/dimmSpd.c M src/vendorcode/amd/agesa/f14/AGESA.h M src/vendorcode/amd/agesa/f15tn/AGESA.h M src/vendorcode/amd/agesa/f16kb/AGESA.h 6 files changed, 9 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/44498/2