Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31661
Change subject: soc/intel/braswell: Add SMBus support ......................................................................
soc/intel/braswell: Add SMBus support
Intel Braswell SoC contains SMBus controller but not support is available for this controller. This controller is compatible with the Intel SMBus support in the southbridge directory. This smbus.c file in that directory is included. This smbus.c file can be included in build using config SOUTHBRIDGE_INTEL_COMMON and SOUTHBRIDGE_INTEL_COMMON_SMBUS also. This results into build errors, caused by pmbase.c and rtc.c which is include always..
BUG=N/A TEST= Facebook FBG-1710 LCD panel
Change-Id: Ie3d4f657558a1aed21b083ef5cad08ea96e629c3 Signed-off-by: Frans Hendriks fhendriks@eltan.com --- M src/soc/intel/braswell/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/31661/1
diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index d5fe1ab..c7d0c6e 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -39,6 +39,7 @@ ramstage-y += sata.c ramstage-y += scc.c ramstage-y += sd.c +ramstage-y += ../../../southbridge/intel/common/smbus.c ramstage-y += smm.c ramstage-y += southcluster.c ramstage-y += spi.c