Attention is currently required from: Julius Werner. HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49516 )
Change subject: soc/nvidia/tegra210/spi.c: Remove repeated word ......................................................................
soc/nvidia/tegra210/spi.c: Remove repeated word
Change-Id: Iea0c973b2bd493eb69ef76289b5b4fc66ac622f6 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/soc/nvidia/tegra210/spi.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/49516/1
diff --git a/src/soc/nvidia/tegra210/spi.c b/src/soc/nvidia/tegra210/spi.c index 66f9fd8..f8db110 100644 --- a/src/soc/nvidia/tegra210/spi.c +++ b/src/soc/nvidia/tegra210/spi.c @@ -639,7 +639,7 @@ * When we enable caching we'll need to clean/invalidate portions of * memory. So we need to be careful about memory alignment. Also, DMA * likes to operate on 4-bytes at a time on the AHB side. So for - * example, if we only want to receive 1 byte, 4 bytes will be be + * example, if we only want to receive 1 byte, 4 bytes will be * written in memory even if those extra 3 bytes are beyond the length * we want. *