[coreboot-gerrit] Change in coreboot[master]: soc/intel/common: Fix logic escape in heci code

[Lijian Zhao (Code Review)]

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/22910

Change subject: soc/intel/common: Fix logic escape in heci code
......................................................................

soc/intel/common: Fix logic escape in heci code

If heci get timed out, there's no need to read back reply message to
decide the heci recive is successful or not.

BUG=b:707290799
TEST=Boot up method board without battery, and confirm hard reset got
trigged after heci time out

Change-Id: I7c1655284d7027294d8ff5d6a5dbbebe4cbd0c47
Signed-off-by: Lijian Zhao 
---
M src/soc/intel/cannonlake/reset.c
M src/soc/intel/common/block/cse/cse.c
2 files changed, 5 insertions(+), 8 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/22910/1

diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c
index 03f9cb8..60b6bd3 100644
--- a/src/soc/intel/cannonlake/reset.c
+++ b/src/soc/intel/cannonlake/reset.c
@@ -67,14 +67,7 @@

reply_size = sizeof(reply);
    memset(&reply, 0, reply_size);
-	heci_receive(&reply, &reply_size);
-	/* get reply result from HECI MSG  */
-	if (reply.result != 0) {
-		printk(BIOS_DEBUG, "%s: Exit with Failure\n", __func__);
-		return -1;
-	}
-	printk(BIOS_DEBUG, "%s: Exit with Success\n",  __func__);
-	return 0;
+	return heci_receive(&reply, &reply_size);
 }

void do_global_reset(void)
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c
index 370074e..e3c1d71 100644
--- a/src/soc/intel/common/block/cse/cse.c
+++ b/src/soc/intel/common/block/cse/cse.c
@@ -438,6 +438,10 @@
    	 */
    	do {
    		received = recv_one_message(&hdr, p, left);
+			if (received == 0) {
+				printk(BIOS_ERR, "HECI: Failed t\n");
+				return 1;
+			}
    		left -= received;
    		p += received;
    		/* If we read out everything ping to send more */