[coreboot-gerrit] Change in coreboot[master]: soc/intel/xeon_sp/cpx: Align Cooper Lake CPUID as per EDS

[Subrata Banik (Code Review)]

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56332 )

Change subject: soc/intel/xeon_sp/cpx: Align Cooper Lake CPUID as per EDS
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soc/intel/xeon_sp/cpx: Align Cooper Lake CPUID as per EDS

This patch removes leading zero from CPUIDs as below:
0x05065a -> 0x5065a
0x05065b -> 0x5065b

Change-Id: I240a06e3b3d7e3dc080f9a9ed1539fadc982495d
Signed-off-by: Subrata Banik 
---
M src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/56332/1

diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h b/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
index 693de8f..716fe29e 100644
--- a/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
+++ b/src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
@@ -6,8 +6,8 @@
 #include <device/device.h>
 #include <cpu/x86/msr.h>

-#define CPUID_COOPERLAKE_SP_A0			0x05065a
-#define CPUID_COOPERLAKE_SP_A1			0x05065b
+#define CPUID_COOPERLAKE_SP_A0			0x5065a
+#define CPUID_COOPERLAKE_SP_A1			0x5065b

void cpx_init_cpus(struct device *dev);