Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85644?usp=email )
Change subject: device/pci_ids: Rename and add PCI IDs for Intel Touch Controller ......................................................................
device/pci_ids: Rename and add PCI IDs for Intel Touch Controller
The previous device IDs for the Intel Touch Controller were generic and did not distinguish between the different variants of the controller. This commit adds specific device IDs for each variant.
References: - Document #640228 Meteor Lake External Design Specification vol. 1 - Document #815002 Panther Lake External Design Specification vol. 1
BUG=none TEST=TBD
Change-Id: I60d9bec60d0578bd5a12a4df25248b7ae58539d6 Signed-off-by: Jeremy Compostella jeremy.compostella@intel.com --- M src/include/device/pci_ids.h 1 file changed, 12 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/85644/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 60ed807..4279588 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4945,10 +4945,18 @@ #define PCI_DID_INTEL_EHL_GBE_PSE_1 0x4BB0
/* Intel Touch Controller */ -#define PCI_DID_INTEL_MTL_THC0_1 0x7e48 -#define PCI_DID_INTEL_MTL_THC0_2 0x7e49 -#define PCI_DID_INTEL_MTL_THC1_1 0x7e4a -#define PCI_DID_INTEL_MTL_THC1_2 0x7e4b +#define PCI_DID_INTEL_MTL_THC0_INTEL 0x7e48 +#define PCI_DID_INTEL_MTL_THC0_SPI 0x7e49 +#define PCI_DID_INTEL_MTL_THC1_INTEL 0x7e4a +#define PCI_DID_INTEL_MTL_THC1_SPI 0x7e4b +#define PCI_DID_INTEL_PTL_U_H_THC0_I2C 0xe348 +#define PCI_DID_INTEL_PTL_U_H_THC0_SPI 0xe349 +#define PCI_DID_INTEL_PTL_U_H_THC1_I2C 0xe34a +#define PCI_DID_INTEL_PTL_U_H_THC1_SPI 0xe34b +#define PCI_DID_INTEL_PTL_H_THC0_I2C 0xe448 +#define PCI_DID_INTEL_PTL_H_THC0_SPI 0xe449 +#define PCI_DID_INTEL_PTL_H_THC1_I2C 0xe44a +#define PCI_DID_INTEL_PTL_H_THC1_SPI 0xe44b
#define PCI_VID_COMPUTONE 0x8e0e #define PCI_DID_COMPUTONE_IP2EX 0x0291