[coreboot-gerrit] [XS] Change in coreboot[main]: mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining

[SH Kim (Code Review)]

SH Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82778?usp=email )

Change subject: mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining
......................................................................

mb/google/brya/var/xol: Enable FSP UPD LpDdrDqDqsReTraining

Set LpDdrDqDqsReTraining to 1 for xol. Value 0 will cause black screen
issue.

Reference: https://review.coreboot.org/c/coreboot/+/79527
> FSP default value for LpDdrDqDqsReTraining is 1. For boards
> that didn't set LpDdrDqDqsReTraining to any value, 0 was being
> assigned and it caused black screen issue.

BUG=b:332980211
BRANCH=brya
TEST=Built and verified there is no black screen issue during power
on/off test for over 100 cycles.

Change-Id: Ia346ce559b4509ea1a63abe28b12ad909f9b7b0d
Signed-off-by: Seunghwan Kim 
---
M src/mainboard/google/brya/variants/xol/memory.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/82778/1

diff --git a/src/mainboard/google/brya/variants/xol/memory.c b/src/mainboard/google/brya/variants/xol/memory.c
index 4e29412..b0cbaad 100644
--- a/src/mainboard/google/brya/variants/xol/memory.c
+++ b/src/mainboard/google/brya/variants/xol/memory.c
@@ -63,6 +63,8 @@
    	.ccc_config = 0xff,
    },

+	.LpDdrDqDqsReTraining = 1,
+
    .ect = 1, /* Early Command Training */

.UserBd = BOARD_TYPE_ULT_ULX,