coreboot-gerrit January 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: ifdtool: refactor region-permission-related functions
by build bot (Jenkins) (Code Review) 05 Jan '18

05 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21416 ) Change subject: ifdtool: refactor region-permission-related functions ...................................................................... Patch Set 65: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/20067/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65336/ : SUCCESS -- To view, visit https://review.coreboot.org/21416 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4d34606545db4d970ce3ec202da4bf4c5cbad18c Gerrit-Change-Number: 21416 Gerrit-PatchSet: 65 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Shawn Chang <citypw(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 05 Jan 2018 09:42:22 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: Nami: Enable elan touchpad
by build bot (Jenkins) (Code Review) 05 Jan '18

05 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23133 ) Change subject: Nami: Enable elan touchpad ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/65334/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/20065/ : SUCCESS -- To view, visit https://review.coreboot.org/23133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I14471d1473a3b3ecf15aaf362b47874704cd3bf0 Gerrit-Change-Number: 23133 Gerrit-PatchSet: 1 Gerrit-Owner: Van Chen <van_chen(a)compal.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 05 Jan 2018 09:08:32 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: Nami: Enable elan touchpad
by Van Chen (Code Review) 05 Jan '18

05 Jan '18

Van Chen has uploaded this change for review. ( https://review.coreboot.org/23133 Change subject: Nami: Enable elan touchpad ...................................................................... Nami: Enable elan touchpad BUG=none TEST= 1. emerge-nami coreboot chromeos-bootimage 2. check touchpad function Change-Id: I14471d1473a3b3ecf15aaf362b47874704cd3bf0 --- M src/mainboard/google/poppy/variants/nami/devicetree.cb 1 file changed, 10 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/23133/1 diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 5e23d45..77b3cf0 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -250,7 +250,16 @@ device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem device pci 15.0 on end # I2C #0 - device pci 15.1 on end # I2C #1 + device pci 15.1 on + chip drivers/i2c/generic + register "hid" = ""ELAN0000"" + register "desc" = ""ELAN Touchpad"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_E3_IRQ)" + register "wake" = "GPP_C7" + register "probed" = "1" + device i2c 15 on end + end + end # I2C #1 device pci 15.2 on end # I2C #2 device pci 15.3 on chip drivers/generic/max98357a -- To view, visit https://review.coreboot.org/23133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I14471d1473a3b3ecf15aaf362b47874704cd3bf0 Gerrit-Change-Number: 23133 Gerrit-PatchSet: 1 Gerrit-Owner: Van Chen <van_chen(a)compal.corp-partner.google.com>

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Change in coreboot[master]: amdfwtool: Add SPI mode and SPI speed support
by build bot (Jenkins) (Code Review) 05 Jan '18

05 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23132 ) Change subject: amdfwtool: Add SPI mode and SPI speed support ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/65333/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/20064/ : SUCCESS -- To view, visit https://review.coreboot.org/23132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I025ab969893553982bb2191111912f7334143440 Gerrit-Change-Number: 23132 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 05 Jan 2018 07:06:39 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: amdfwtool: Add SPI mode and SPI speed support
by Marc Jones (Code Review) 05 Jan '18

05 Jan '18

Marc Jones has uploaded this change for review. ( https://review.coreboot.org/23132 Change subject: amdfwtool: Add SPI mode and SPI speed support ...................................................................... amdfwtool: Add SPI mode and SPI speed support Add SPI mode and SPI speed setting to the ROMSIG. This is used by AGESA and the PSP for optimal SPI ROM reads. BUG=b:70844938 TEST=build with mode and speed options. Check ROMSIG offset 0x40 is set as expected. Change-Id: I025ab969893553982bb2191111912f7334143440 Signed-off-by: Marc Jones <marcj303(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 175 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/23132/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 61c2a05..5a06e2a 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -21,6 +21,12 @@ * +------------+---------------+----------------+------------+ * | PSPDIR ADDR|PSPDIR ADDR |<-- Field 0x14 could be either * +------------+---------------+ 2nd PSP directory or PSP COMBO directory + * ... + * 40 + * +------------+ + * | SPI Mode | <- SPI mode(0x40) and SPI fast read speed(0x41) + * +------------+ + * * EC ROM should be 64K aligned. * * PSP directory (Where "PSPDIR ADDR" points) @@ -58,7 +64,6 @@ * +------------+---------------+----------------+------------+ * */ - #include <fcntl.h> #include <errno.h> #include <stdio.h> @@ -77,6 +82,7 @@ #define MIN_ROM_KB 256 #define ALIGN(val, by) (((val) + (by) - 1) & ~((by) - 1)) +#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) /* Reserved for future. @@ -191,6 +197,10 @@ MIN_ROM_KB); printf(" and must a multiple of 1024\n"); printf("-l | --location Location of Directory\n"); + printf("-q | --spimode <MODE> norm33, norm66\n"); + printf(" dual112, dual122\n"); + printf(" quad114, quad144, fast\n"); + printf("-z | --spispeed <SPEED> 16, 22, 33, 66, 100 (Mhz)\n"); printf("-h | --help show this help\n"); } @@ -376,17 +386,129 @@ return pos; } +/* + * SPI read modes + * 000b Normal read (up to 33M) + * 001b Reserved + * 010b Dual IO (1-1-2) + * 011b Quad IO (1-1-4) + * 100b Dual IO (1-2-2) + * 101b Quad IO (1-4-4) + * 110b Normal read (up to 66M) + * 111b Fast Read + */ + +struct spimodes { + char *mode; + uint8_t val; +}; + +static const struct spimodes modesettings[] = { + { + .mode = "norm33", + .val = 0 + }, + { + .mode = "norm66", + .val = 6, + }, + { + .mode = "dual112", + .val = 2, + }, + { + .mode = "dual122", + .val = 4, + }, + { + .mode = "quad114", + .val = 3, + }, + { + .mode = "quad144", + .val = 5 + }, + { + .mode = "fast", + .val = 7, + }, +}; + +/* + * SPI read speed + * 0000b 66.66 MHz 0100b 100 MHz + * 0001b 33.33 MHz 0101b 800 KHz + * 0010b 22.22 MHz 1111b-0110b Reserved + * 0011b 16.66 MHz + */ + + +struct spispeeds { + uint8_t speed; + uint8_t val; +}; + +static const struct spispeeds speedsettings[] = { + { + .speed = 66, + .val = 0, + }, + { + .speed = 33, + .val = 1, + }, + { + .speed = 22, + .val = 2, + }, + { + .speed = 16, + .val = 3, + }, + { + .speed = 100, + .val = 4, + }, +}; + +/* + * Set the mode in ROM_SIG offset 0x40 and the speed in offset 0x41. + */ +static void spi_mode_speed(uint32_t *romsig, char *spimode, uint8_t spispeed) +{ + uint8_t modeval; + uint8_t speedval; + int i; + + for (i = 0; i < ARRAY_SIZE(modesettings); i++) { + if (strcmp(spimode, modesettings[i].mode) == 0) { + modeval = modesettings[i].val; + break; + } + } + + for (i = 0; i < ARRAY_SIZE(speedsettings); i++) { + if (spispeed == speedsettings[i].speed) { + speedval = speedsettings[i].val; + break; + } + } + + romsig[16] = modeval | speedval << 8 | 0xDEAD << 16; +} + #if PSP2 static const char *optstring = - "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:P:B:S:L:R:K:C:N:D:T:U:W:E:M:o:f:l:h"; + "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:P:B:S:L:R:K:C:N:D:T:U:W:E:M:o:f:l:q:z:h"; #else -static const char *optstring = "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:o:f:l:h"; +static const char *optstring = "x:i:g:p:b:s:r:k:c:n:d:t:u:w:m:o:f:l:q:z:h"; #endif static struct option long_options[] = { {"xhci", required_argument, 0, 'x' }, {"imc", required_argument, 0, 'i' }, {"gec", required_argument, 0, 'g' }, + /* PSP */ {"pubkey", required_argument, 0, 'p' }, {"bootloader", required_argument, 0, 'b' }, @@ -422,6 +544,8 @@ {"output", required_argument, 0, 'o' }, {"flashsize", required_argument, 0, 'f' }, {"location", required_argument, 0, 'l' }, + {"spimode", required_argument, 0, 'q' }, + {"spispeed", required_argument, 0, 'z' }, {"help", no_argument, 0, 'h' }, {NULL, 0, 0, 0 } @@ -484,6 +608,9 @@ uint32_t dir_location = 0; uint32_t romsig_offset; uint32_t rom_base_address; + uint8_t spispeed = 0; + char *spimode = NULL; + int i; while (1) { int optindex = 0; @@ -636,6 +763,17 @@ retval = 1; } break; + case 'q': + spimode = optarg; + break; + case 'z': + spispeed = (uint8_t)strtoul(optarg, &tmp, 10); + if (*tmp != '\0') { + printf("Error: spispeed specified" + " incorrectly (%s)\n\n", optarg); + retval = 1; + } + break; case 'h': usage(); @@ -667,6 +805,36 @@ retval = 1; } + if (spimode) { + for (i = 0; i < ARRAY_SIZE(modesettings); i++) { + if (strcmp(spimode, modesettings[i].mode) == 0) + break; + } + + if (i == ARRAY_SIZE(modesettings)) { + printf("Error: spimode %s is not supported.\n", + spimode); + printf(" Valid values are: norm33, norm66\n"); + printf(" dual112, dual122\n"); + printf(" quad114, quad144\n"); + printf(" fast\n\n"); + retval = 1; + } + } + + if (spispeed) { + for (i = 0; i < ARRAY_SIZE(speedsettings); i++) { + if (spispeed == speedsettings[i].speed) + break; + } + + if (i == ARRAY_SIZE(speedsettings)) { + printf("Error: spispeed %d is not supported.\n", spispeed); + printf(" Valid speeds are 16, 33, 66, and 100 (Mhz).\n\n"); + retval = 1; + } + } + if (retval) { usage(); return retval; @@ -714,7 +882,9 @@ amd_romsig[2] = 0; amd_romsig[3] = 0; - current += 0x20; /* size of ROMSIG */ + spi_mode_speed(amd_romsig, spimode, spispeed); + + current += 0x50; /* size of ROMSIG */ current = ALIGN(current, 0x1000U); current = integrate_firmwares(rom, current, amd_romsig, amd_fw_table, rom_size); @@ -769,6 +939,7 @@ } #endif + targetfd = open(output, O_RDWR | O_CREAT | O_TRUNC, 0666); if (targetfd >= 0) { write(targetfd, amd_romsig, current - romsig_offset); -- To view, visit https://review.coreboot.org/23132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I025ab969893553982bb2191111912f7334143440 Gerrit-Change-Number: 23132 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com>

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Change in coreboot[master]: util/gitconfig: Use `make` in git hooks
by build bot (Jenkins) (Code Review) 05 Jan '18

05 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23096 ) Change subject: util/gitconfig: Use `make` in git hooks ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/20061/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65330/ : SUCCESS -- To view, visit https://review.coreboot.org/23096 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia78e06567b904b342dc9b7778569201fe02e6897 Gerrit-Change-Number: 23096 Gerrit-PatchSet: 3 Gerrit-Owner: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> Gerrit-Reviewer: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 05 Jan 2018 06:53:54 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: google/chromeec: Enable unified host event programming interface
by build bot (Jenkins) (Code Review) 05 Jan '18

05 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21085 ) Change subject: google/chromeec: Enable unified host event programming interface ...................................................................... Patch Set 10: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/20062/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65331/ : SUCCESS -- To view, visit https://review.coreboot.org/21085 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4917a222c79b6aaecb71d7704ffde57bf3bc99d9 Gerrit-Change-Number: 21085 Gerrit-PatchSet: 10 Gerrit-Owner: Jenny Tc <jenny.tc(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jenny Tc <jenny.tc(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 05 Jan 2018 06:50:41 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/poppy: Set S0ix lazy wake mask
by build bot (Jenkins) (Code Review) 05 Jan '18

05 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21086 ) Change subject: mb/google/poppy: Set S0ix lazy wake mask ...................................................................... Patch Set 6: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/20063/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65332/ : SUCCESS -- To view, visit https://review.coreboot.org/21086 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I65173104fce258d03956bbb0e80073c47fe80fab Gerrit-Change-Number: 21086 Gerrit-PatchSet: 6 Gerrit-Owner: Jenny Tc <jenny.tc(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jenny Tc <jenny.tc(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 05 Jan 2018 06:50:11 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/glkrvp: Add EC_GOOGLE_CHROMEEC_SWITCHES
by build bot (Jenkins) (Code Review) 05 Jan '18

05 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23131 ) Change subject: mainboard/glkrvp: Add EC_GOOGLE_CHROMEEC_SWITCHES ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/20060/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65329/ : SUCCESS -- To view, visit https://review.coreboot.org/23131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I93a2ba63015db17989c89ce1b5897de6a93e201f Gerrit-Change-Number: 23131 Gerrit-PatchSet: 2 Gerrit-Owner: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 05 Jan 2018 06:49:09 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/glkrvp: Add RECOVERY_CACHE
by build bot (Jenkins) (Code Review) 05 Jan '18

05 Jan '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23067 ) Change subject: mainboard/glkrvp: Add RECOVERY_CACHE ...................................................................... Patch Set 5: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/20058/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/65327/ : SUCCESS -- To view, visit https://review.coreboot.org/23067 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9b32628d814693fb0591fc3750348d48cf9e26f1 Gerrit-Change-Number: 23067 Gerrit-PatchSet: 5 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 05 Jan 2018 06:42:47 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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coreboot-gerrit January 2018