coreboot-gerrit October 2015

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: Drop SuperIO nsc/pc8374
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit 0cca93162f0176a47a95a71edf84801848af9699 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Oct 28 18:06:29 2015 -0700 Drop SuperIO nsc/pc8374 All boards using this SuperIO have been removed from the tree. Change-Id: I1d13ec7c5f27e82523612af7f07fca3176953600 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/12239 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/12239 for details. -gerrit

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Patch merged into coreboot/master: Drop southbridge intel/esb6300
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit 3e6ba4daccd9fdc451c6c4704e7d02ca6e6e85fc Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Oct 28 18:02:35 2015 -0700 Drop southbridge intel/esb6300 All mainboards using this southbridge have been removed from the tree already. Change-Id: I4398ef1e270bd0f36c5dd1c6ec3bfec6c2c091e6 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/12238 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/12238 for details. -gerrit

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Patch merged into coreboot/master: Drop southbridge intel/i82801cx
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit 3efcd2eeee8b3c68996cbe763685117eff483c08 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Oct 28 18:01:22 2015 -0700 Drop southbridge intel/i82801cx All boards using this southbridge have been removed from the tree already. Change-Id: I08269931d845d1f57b34174238bcce245ad77894 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/12237 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/12237 for details. -gerrit

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Patch merged into coreboot/master: Drop northbridge/i440lx
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit 31ff120a2c541aecfef318a19ad033c6b8f6fabd Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Oct 28 17:59:56 2015 -0700 Drop northbridge/i440lx All boards using it have been deleted a long time ago. Change-Id: Ib1c4018ab6ec27868c0e2fdbf9c91323ead076fb Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/12236 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/12236 for details. -gerrit

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Patch merged into coreboot/master: wakeup: Switch back to 32bit mode first
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit ac901e6bedc98d115ebb8089afd8f67aef39c000 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Fri Jul 31 16:46:28 2015 -0700 wakeup: Switch back to 32bit mode first On x86_64 we need to leave long mode before we can switch to 16bit mode. Oh joy! When's my 64bit resume pointer coming? Why didn't this get caught earlier? Seems the Asrock E350M2 didn't do Suspend/Resume? Yes, I know it's Intel syntax. Will be converted to AT&T syntax as soon as the whole thing actually works.. 8) Change-Id: Ic51869cf67d842041f8842cd9964d72a024c335f Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/11106 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/11106 for details. -gerrit

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Patch merged into coreboot/master: Drop geode_post_code.h
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit f79d05b7789feced96fc2fb71a30f3b2214c7b1c Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Oct 28 17:20:00 2015 -0700 Drop geode_post_code.h It's unused and empty. Change-Id: Ieb9225083cb779b7b94ca47488dad4d7beb30a94 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/12235 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/12235 for details. -gerrit

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Patch merged into coreboot/master: smm: 64bit fixes
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit 01327d185b5b9a2d9848c0097f6477ebe94c97ec Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jul 30 16:28:44 2015 -0700 smm: 64bit fixes Change-Id: I35dab4e66514948aafa912d993fb8d42c5a520a0 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/11089 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/11089 for details. -gerrit

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Patch merged into coreboot/master: Drop unused code from gcc-intrin.h
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit 16643aa686dafb3e9b70e74856d77e9d863e6fd0 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Fri Jul 31 16:44:55 2015 -0700 Drop unused code from gcc-intrin.h Change-Id: I3df66320d0bc18221f947b47e7f09533daafabad Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/11108 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/11108 for details. -gerrit

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Patch merged into coreboot/master: AMD mainboards: Fix 64bit BiosCallOuts.c
by gerrit＠coreboot.org 30 Oct '15

30 Oct '15

the following patch was just integrated into master: commit dd132a5d2d58ba011d535ae86a18e166d0cf5818 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jul 30 11:16:37 2015 -0700 AMD mainboards: Fix 64bit BiosCallOuts.c Change-Id: I0f3297dff47dfb44da034ac6f305dcf1981b9de1 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/11080 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/11080 for details. -gerrit

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Patch set updated for coreboot: cpu/x86/lapic: Add stack overrun detection
by Timothy Pearson 30 Oct '15

30 Oct '15

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11963 -gerrit commit 131ec4b72fea4d05901aa4775c39271ce126ffeb Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Sat Sep 5 19:31:20 2015 -0500 cpu/x86/lapic: Add stack overrun detection Change-Id: I03e43f38e0d2e51141208ebb169ad8deba77ab78 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/cpu/x86/lapic/lapic_cpu_init.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index 7fedd00..faa1f1f 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -5,6 +5,7 @@ * Copyright (C) 2001 Ronald G. Minnich * Copyright (C) 2005 Yinghai Lu * Copyright (C) 2008 coresystems GmbH + * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -494,6 +495,7 @@ static void wait_other_cpus_stop(struct bus *cpu_bus) } } printk(BIOS_DEBUG, "All AP CPUs stopped (%ld loops)\n", loopcount); + checkstack(_estack, 0); for(i = 1; i <= last_cpu_index; i++) checkstack((void *)stacks[i] + CONFIG_STACK_SIZE, i); }

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coreboot-gerrit October 2015