coreboot-gerrit August 2014

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Patch set updated for coreboot: c54f302 AMD Steppe Eagle: Add 32-bit Fletcher's Checksum computation routine
by Bruce Griffith 27 Aug '14

27 Aug '14

Bruce Griffith (Bruce.Griffith(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6676 -gerrit commit c54f30269b3558cab9421a884e9cf522fe6e9665 Author: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Date: Wed Jul 16 11:25:21 2014 -0600 AMD Steppe Eagle: Add 32-bit Fletcher's Checksum computation routine The AMD Platform Security Processor (PSP) requires a Fletcher's Checksum at the end of the PSP directory. This code implements a Fletcher's Checksum by reading bytes from stdin and writes the bytes back to stdout with a checksum inserted into the byte stream at the appropriate offset. This utility is used on PSP binaries during coreboot build. Include a runtime debug option such that the command: fletcher --print <file.bin >file_with_cksum.bin will print out the computed checksum value for debugging. The compile-time debug option is retained that allows -DDEBUG to be added to the compilation line. This option has the same effect as "--print". Change-Id: I506a479d8204ca4f8267d53aa152ac4b473dbc75 Signed-off-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> --- util/fletcher/Makefile.inc | 8 +++ util/fletcher/fletcher.c | 128 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 136 insertions(+) diff --git a/util/fletcher/Makefile.inc b/util/fletcher/Makefile.inc new file mode 100644 index 0000000..786b069 --- /dev/null +++ b/util/fletcher/Makefile.inc @@ -0,0 +1,8 @@ +fletcher_exe : fletcher.c + gcc fletcher.c -o fletcher + +fletcher : fletcher_exe + +clean: + @rm -f fletcher.o fletcher fletcher.exe + diff --git a/util/fletcher/fletcher.c b/util/fletcher/fletcher.c new file mode 100644 index 0000000..3147d50 --- /dev/null +++ b/util/fletcher/fletcher.c @@ -0,0 +1,128 @@ +/* + * Copyright (c) 1998-2006 The TCPDUMP project + * 2014 Sage Electronic Engineering, LLC + * All Rights Reserved + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that: (1) source code + * distributions retain the above copyright notice and this paragraph + * in its entirety, and (2) distributions including binary code include + * the above copyright notice and this paragraph in its entirety in + * the documentation or other materials provided with the distribution. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND + * WITHOUT ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT + * LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE. + * + * Original code by Hannes Gredler <hannes(a)juniper.net> + * Rewritten for Fletcher32 by Bruce Griffith <Bruce.Griffith(a)se-eng.com> + */ + +#include <errno.h> +#include <stdio.h> +#include <sys/stat.h> +#include <sys/types.h> +#include <unistd.h> +#include <string.h> + +#define MAX_PSP_DIRECTORY_SIZE 512 + +typedef unsigned int uint32_t; +typedef unsigned char uint8_t; +typedef unsigned short uint16_t; + +/* + * Creates the OSI Fletcher checksum. See 8473-1, Appendix C, section C.3. + * The checksum field of the passed PDU does not need to be reset to zero. + * + * The "Fletcher Checksum" was proposed in a paper by John G. Fletcher of + * Lawrence Livermore Labs. The Fletcher Checksum was proposed as an + * alternative to cyclical redundancy checks because it provides error- + * detection properties similar to cyclical redundancy checks but at the + * cost of a simple summation technique. Its characteristics were first + * published in IEEE Transactions on Communications in January 1982. One + * version has been adopted by ISO for use in the class-4 transport layer + * of the network protocol. + * + * This program expects: + * stdin: The input file to compute a checksum for. The input file + * not be longer than 256 bytes. + * stdout: Copied from the input file with the Fletcher's Checksum + * inserted 8 bytes after the beginning of the file. + * stderr: Used to print out error messages. + */ + +uint32_t fletcher32 (const uint16_t *pptr, int length) +{ + + uint32_t c0; + uint32_t c1; + uint32_t checksum; + int index; + + c0 = 0xFFFF; + c1 = 0xFFFF; + + for (index = 0; index < length; index++) { + /* + * Ignore the contents of the checksum field. + */ + c0 += *(pptr++); + c1 += c0; + if ((index % 360) == 0) { + c0 = (c0 & 0xFFFF) + (c0 >> 16); // Sum0 modulo 65535 + the overflow + c1 = (c1 & 0xFFFF) + (c1 >> 16); // Sum1 modulo 65535 + the overflow + } + + } + + c0 = (c0 & 0xFFFF) + (c0 >> 16); // Sum0 modulo 65535 + the overflow + c1 = (c1 & 0xFFFF) + (c1 >> 16); // Sum1 modulo 65535 + the overflow + checksum = (c1 << 16) | c0; + + return checksum; +} + +int main(int argc, char **argv) +{ + uint32_t checksum = 0xFFFFFFFF; + struct stat filestat = {}; + int retcode = EINVAL; + size_t filesize = 0; + char debugoption[] = "--print"; + + uint16_t buffer[MAX_PSP_DIRECTORY_SIZE / sizeof(uint16_t)]; + + retcode = fstat(fileno(stdin), &filestat); + filesize = filestat.st_size; + if (retcode < 0) { + perror("FLETCHER32"); + return errno; + } else if (!((12 < filesize) && (filesize <= sizeof(buffer)))) { + fprintf(stderr, "FLETCHER32: input file is not valid for this program.\n"); + return EINVAL; + } + retcode = read(fileno(stdin), (void *)buffer, filesize); + if (retcode < 0) { + perror("FLETCHER32"); + return errno; + } + + checksum = fletcher32(&buffer[2], filesize/2 - 2); + *((uint32_t *)& buffer[2]) = checksum; +#ifndef DEBUG + if ((argc == 2) && !strncmp(argv[1], debugoption, sizeof(debugoption+1))) { +#endif + fprintf(stderr, "Fletcher's Checksum: %x\n", checksum); +#ifndef DEBUG + } +#endif + + retcode = write(fileno(stdout), buffer, filesize); + if (retcode < 0) { + perror("FLETCHER32"); + return errno; + } + + return 0; +}

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New patch to review for coreboot: 6f58d50 qemu: fix bochs build
by Gerd Hoffmann 27 Aug '14

27 Aug '14

Gerd Hoffmann (kraxel(a)redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6769 -gerrit commit 6f58d5023c1e3a41b408d25d428f38e3b8f0773b Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Wed Aug 27 10:42:47 2014 +0200 qemu: fix bochs build commit 9518b56ab079f4c12eefe83cc9b4fa24b413ebe8 changed "struct edid" and thereby broke the build. Adapt drivers/emulation/qemu/bochs.c to the changes to fix this. Change-Id: Ic295c6d31284555e1463af5bca673231b8722d54 Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/drivers/emulation/qemu/bochs.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/drivers/emulation/qemu/bochs.c b/src/drivers/emulation/qemu/bochs.c index 715c94c..f2e4dfb 100644 --- a/src/drivers/emulation/qemu/bochs.c +++ b/src/drivers/emulation/qemu/bochs.c @@ -114,7 +114,9 @@ static void bochs_init(device_t dev) edid.x_resolution = width; edid.y_resolution = height; edid.bytes_per_line = width * 4; - edid.bpp = 32; + edid.framebuffer_bits_per_pixel = 32; + edid.panel_bits_per_color = 8; + edid.panel_bits_per_pixel = 24; set_vbe_mode_info_valid(&edid, addr); #else vga_misc_write(0x1);

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Patch merged into coreboot/master: 518a322 rmodtool: correct final memory size calculation
by gerrit＠coreboot.org 27 Aug '14

27 Aug '14

the following patch was just integrated into master: commit 518a322d5880a4dd29a943ec474484cd8b48876f Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Aug 26 13:52:30 2014 -0500 rmodtool: correct final memory size calculation Apparently when I originally wrote this I confused myself to no end. The code/data of an rmodule has a set memory size which is associated with the .payload section. The relocation entries may increase the overall footprint of the memory size if the rmodule has no bss but a lot of relocations. Therefore, just compare relocation entries size plus the file size of the .payload section with the memory size of the paylod section. The .empty section is added only when we have not met the final target size. Change-Id: I5521dff048ae64a9b6e3c8f84a390eba37c7d0f5 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/6767 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan(a)google.com> See http://review.coreboot.org/6767 for details. -gerrit

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New patch to review for coreboot: 38ab70f Peppy/Haswell: move more support functions from mainboard to the intel i915 driver
by Isaac Christensen 27 Aug '14

27 Aug '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6768 -gerrit commit 38ab70f7937c7c4e551ea7e3b14f082ae70fa138 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Tue Oct 1 10:46:35 2013 -0700 Peppy/Haswell: move more support functions from mainboard to the intel i915 driver Move (and rename to make it clearer) the function that computes display parameters from the dpcd and edid. Change-Id: Idfbb56fd312b23c742c52abca1a34ae117a8fece Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> Reviewed-on: https://chromium-review.googlesource.com/171366 Reviewed-by: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Reviewed-by: Ronald Minnich <rminnich(a)chromium.org> Tested-by: Ronald Minnich <rminnich(a)chromium.org> Commit-Queue: Ronald Minnich <rminnich(a)chromium.org> (cherry picked from commit 8f2b3bafee7cb05db8fae1c52fc9e1ee64e5e35d) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- src/drivers/intel/gma/Makefile.inc | 2 +- src/drivers/intel/gma/display.c | 118 +++++++++++++++++++++++++++++++++++++ src/drivers/intel/gma/i915.h | 4 ++ src/drivers/intel/gma/intel_dp.c | 16 +++++ src/mainboard/google/peppy/gma.c | 104 +------------------------------- src/mainboard/google/slippy/gma.c | 15 ----- 6 files changed, 140 insertions(+), 119 deletions(-) diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc index bea597e..7a1b97b 100644 --- a/src/drivers/intel/gma/Makefile.inc +++ b/src/drivers/intel/gma/Makefile.inc @@ -17,6 +17,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -ramstage-$(CONFIG_INTEL_DP) += intel_dp.c drm_dp_helper.c +ramstage-$(CONFIG_INTEL_DP) += intel_dp.c drm_dp_helper.c display.c ramstage-$(CONFIG_INTEL_DDI) += intel_ddi.c ramstage-$(CONFIG_INTEL_EDID) += edid.c diff --git a/src/drivers/intel/gma/display.c b/src/drivers/intel/gma/display.c new file mode 100644 index 0000000..5c8e886 --- /dev/null +++ b/src/drivers/intel/gma/display.c @@ -0,0 +1,118 @@ +/* + * Copyright 2013 Google Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard <keithp(a)keithp.com> + * + */ + +/* This code was created by the coccinnelle filters in the i915tool, + * with some final hand filtering. + */ + +#include <console/console.h> +#include <stdint.h> +#include <delay.h> +#include <drivers/intel/gma/i915.h> +#include <string.h> + +void compute_display_params(struct intel_dp *dp) +{ + struct edid *edid = &(dp->edid); + + /* step 1: get the constants in the dp struct set up. */ + dp->lane_count = dp->dpcd[DP_MAX_LANE_COUNT]&DP_LANE_COUNT_MASK; + + dp->link_bw = dp->dpcd[DP_MAX_LINK_RATE]; + dp->clock = intel_dp_bw_code_to_link_rate(dp->link_bw); + dp->edid.link_clock = intel_dp_bw_code_to_link_rate(dp->link_bw); + + /* step 2. Do some computation of other stuff. */ + dp->bytes_per_pixel = dp->pipe_bits_per_pixel/8; + + dp->stride = edid->bytes_per_line; + + dp->htotal = (edid->ha - 1) | ((edid->ha + edid->hbl - 1) << 16); + + dp->hblank = (edid->ha - 1) | ((edid->ha + edid->hbl - 1) << 16); + + dp->hsync = (edid->ha + edid->hso - 1) | + ((edid->ha + edid->hso + edid->hspw - 1) << 16); + + dp->vtotal = (edid->va - 1) | ((edid->va + edid->vbl - 1) << 16); + + dp->vblank = (edid->va - 1) | ((edid->va + edid->vbl - 1) << 16); + + dp->vsync = (edid->va + edid->vso - 1) | + ((edid->va + edid->vso + edid->vspw - 1) << 16); + + /* PIPEASRC is wid-1 x ht-1 */ + dp->pipesrc = (edid->ha-1)<<16 | (edid->va-1); + + dp->pfa_pos = 0; + + dp->pfa_ctl = PF_ENABLE | PF_FILTER_MED_3x3; + /* IVB hack */ + if (dp->gen == 6) + dp->pfa_ctl |= PF_PIPE_SEL_IVB(dp->pipe); + + dp->pfa_sz = (edid->ha << 16) | (edid->va); + + /* step 3. Call the linux code we pulled in. */ + dp->flags = intel_ddi_calc_transcoder_flags(edid->panel_bits_per_pixel, + dp->port, + dp->pipe, + dp->type, + dp->lane_count, + dp->pfa_sz, + dp->edid.phsync == '+'?1:0, + dp->edid.pvsync == '+'?1:0); + + dp->transcoder = intel_ddi_get_transcoder(dp->port, + dp->pipe); + + intel_dp_compute_m_n(edid->panel_bits_per_pixel, + dp->lane_count, + dp->edid.pixel_clock, + dp->edid.link_clock, + &dp->m_n); + + printk(BIOS_SPEW, "dp->lane_count = 0x%08x\n",dp->lane_count); + printk(BIOS_SPEW, "dp->stride = 0x%08x\n",dp->stride); + printk(BIOS_SPEW, "dp->htotal = 0x%08x\n", dp->htotal); + printk(BIOS_SPEW, "dp->hblank = 0x%08x\n", dp->hblank); + printk(BIOS_SPEW, "dp->hsync = 0x%08x\n", dp->hsync); + printk(BIOS_SPEW, "dp->vtotal = 0x%08x\n", dp->vtotal); + printk(BIOS_SPEW, "dp->vblank = 0x%08x\n", dp->vblank); + printk(BIOS_SPEW, "dp->vsync = 0x%08x\n", dp->vsync); + printk(BIOS_SPEW, "dp->pipesrc = 0x%08x\n", dp->pipesrc); + printk(BIOS_SPEW, "dp->pfa_pos = 0x%08x\n", dp->pfa_pos); + printk(BIOS_SPEW, "dp->pfa_ctl = 0x%08x\n", dp->pfa_ctl); + printk(BIOS_SPEW, "dp->pfa_sz = 0x%08x\n", dp->pfa_sz); + printk(BIOS_SPEW, "dp->link_m = 0x%08x\n", dp->m_n.link_m); + printk(BIOS_SPEW, "dp->link_n = 0x%08x\n", dp->m_n.link_n); + printk(BIOS_SPEW, "0x6f030 = 0x%08x\n", + TU_SIZE(dp->m_n.tu) | dp->m_n.gmch_m); + printk(BIOS_SPEW, "0x6f030 = 0x%08x\n", dp->m_n.gmch_m); + printk(BIOS_SPEW, "0x6f034 = 0x%08x\n", dp->m_n.gmch_n); + printk(BIOS_SPEW, "dp->flags = 0x%08x\n", dp->flags); +} diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h index e8940a3..15a2009 100644 --- a/src/drivers/intel/gma/i915.h +++ b/src/drivers/intel/gma/i915.h @@ -242,6 +242,7 @@ enum transcoder intel_ddi_get_transcoder(enum port port, enum pipe pipe); void intel_dp_set_m_n_regs(struct intel_dp *intel_dp); +int intel_dp_bw_code_to_link_rate(u8 link_bw); void intel_dp_set_resolution(struct intel_dp *intel_dp); int intel_dp_i2c_write(struct intel_dp *intel_dp, @@ -278,3 +279,6 @@ u32 gtt_read(u32 reg); int i915lightup(unsigned int physbase, unsigned int mmio, unsigned int gfx, unsigned int init_fb); + +/* display.c */ +void compute_display_params(struct intel_dp *dp); diff --git a/src/drivers/intel/gma/intel_dp.c b/src/drivers/intel/gma/intel_dp.c index 393692b..0a28a0b 100644 --- a/src/drivers/intel/gma/intel_dp.c +++ b/src/drivers/intel/gma/intel_dp.c @@ -1787,6 +1787,22 @@ void intel_dp_set_m_n_regs(struct intel_dp *dp) gtt_write(PIPE_LINK_N1(dp->transcoder),dp->m_n.link_n); } +int intel_dp_bw_code_to_link_rate(u8 link_bw) +{ + switch (link_bw) { + default: + printk(BIOS_ERR, + "ERROR: link_bw(%d) is bogus; must be one of 6, 0xa, or 0x14\n", + link_bw); + case DP_LINK_BW_1_62: + return 162000; + case DP_LINK_BW_2_7: + return 270000; + case DP_LINK_BW_5_4: + return 540000; + } +} + void intel_dp_set_resolution(struct intel_dp *intel_dp) { gtt_write(HTOTAL(intel_dp->transcoder),intel_dp->htotal); diff --git a/src/mainboard/google/peppy/gma.c b/src/mainboard/google/peppy/gma.c index 683f69b..9c76c80 100644 --- a/src/mainboard/google/peppy/gma.c +++ b/src/mainboard/google/peppy/gma.c @@ -91,8 +91,6 @@ static unsigned int *mmio; static unsigned int graphics; static unsigned int physbase; -int intel_dp_bw_code_to_link_rate(u8 link_bw); - static int i915_init_done = 0; /* fill the palette. */ @@ -106,106 +104,6 @@ static void palette(void) } } -/* assumption: the dpcd in the dp is valid. The raw edid has been read - * and the translation has been done. - */ -void dp_init_dim_regs(struct intel_dp *dp); -void dp_init_dim_regs(struct intel_dp *dp) -{ - struct edid *edid = &(dp->edid); - - /* step 1: get the constants in the dp struct set up. */ - dp->lane_count = dp->dpcd[DP_MAX_LANE_COUNT]&DP_LANE_COUNT_MASK; - - dp->link_bw = dp->dpcd[DP_MAX_LINK_RATE]; - dp->clock = intel_dp_bw_code_to_link_rate(dp->link_bw); - dp->edid.link_clock = intel_dp_bw_code_to_link_rate(dp->link_bw); - - /* step 2. Do some computation of other stuff. */ - dp->bytes_per_pixel = dp->pipe_bits_per_pixel/8; - - dp->stride = edid->bytes_per_line; - - dp->htotal = (edid->ha - 1) | ((edid->ha + edid->hbl - 1) << 16); - - dp->hblank = (edid->ha - 1) | ((edid->ha + edid->hbl - 1) << 16); - - dp->hsync = (edid->ha + edid->hso - 1) | - ((edid->ha + edid->hso + edid->hspw - 1) << 16); - - dp->vtotal = (edid->va - 1) | ((edid->va + edid->vbl - 1) << 16); - - dp->vblank = (edid->va - 1) | ((edid->va + edid->vbl - 1) << 16); - - dp->vsync = (edid->va + edid->vso - 1) | - ((edid->va + edid->vso + edid->vspw - 1) << 16); - - /* PIPEASRC is wid-1 x ht-1 */ - dp->pipesrc = (edid->ha-1)<<16 | (edid->va-1); - - dp->pfa_pos = 0; - - /* XXXXXXXXXXXXXX hard code */ - dp->pfa_ctl = 0x80800000; - - dp->pfa_sz = (edid->ha << 16) | (edid->va); - - /* step 3. Call the linux code we pulled in. */ - dp->flags = intel_ddi_calc_transcoder_flags(edid->panel_bits_per_pixel, - dp->port, - dp->pipe, - dp->type, - dp->lane_count, - dp->pfa_sz, - dp->edid.phsync == '+'?1:0, - dp->edid.pvsync == '+'?1:0); - - dp->transcoder = intel_ddi_get_transcoder(dp->port, - dp->pipe); - - intel_dp_compute_m_n(edid->panel_bits_per_pixel, - dp->lane_count, - dp->edid.pixel_clock, - dp->edid.link_clock, - &dp->m_n); - - printk(BIOS_SPEW, "dp->lane_count = 0x%08x\n",dp->lane_count); - printk(BIOS_SPEW, "dp->stride = 0x%08x\n",dp->stride); - printk(BIOS_SPEW, "dp->htotal = 0x%08x\n", dp->htotal); - printk(BIOS_SPEW, "dp->hblank = 0x%08x\n", dp->hblank); - printk(BIOS_SPEW, "dp->hsync = 0x%08x\n", dp->hsync); - printk(BIOS_SPEW, "dp->vtotal = 0x%08x\n", dp->vtotal); - printk(BIOS_SPEW, "dp->vblank = 0x%08x\n", dp->vblank); - printk(BIOS_SPEW, "dp->vsync = 0x%08x\n", dp->vsync); - printk(BIOS_SPEW, "dp->pipesrc = 0x%08x\n", dp->pipesrc); - printk(BIOS_SPEW, "dp->pfa_pos = 0x%08x\n", dp->pfa_pos); - printk(BIOS_SPEW, "dp->pfa_ctl = 0x%08x\n", dp->pfa_ctl); - printk(BIOS_SPEW, "dp->pfa_sz = 0x%08x\n", dp->pfa_sz); - printk(BIOS_SPEW, "dp->link_m = 0x%08x\n", dp->m_n.link_m); - printk(BIOS_SPEW, "dp->link_n = 0x%08x\n", dp->m_n.link_n); - printk(BIOS_SPEW, "0x6f030 = 0x%08x\n", - TU_SIZE(dp->m_n.tu) | dp->m_n.gmch_m); - printk(BIOS_SPEW, "0x6f030 = 0x%08x\n", dp->m_n.gmch_m); - printk(BIOS_SPEW, "0x6f034 = 0x%08x\n", dp->m_n.gmch_n); - printk(BIOS_SPEW, "dp->flags = 0x%08x\n", dp->flags); -} - -int intel_dp_bw_code_to_link_rate(u8 link_bw) -{ - switch (link_bw) { - default: - printk(BIOS_ERR, - "ERROR: link_bw(%d) is bogus; must be one of 6, 0xa, or 0x14\n", - link_bw); - case DP_LINK_BW_1_62: - return 162000; - case DP_LINK_BW_2_7: - return 270000; - case DP_LINK_BW_5_4: - return 540000; - } -} - void mainboard_train_link(struct intel_dp *intel_dp) { u8 read_val; @@ -366,7 +264,7 @@ int i915lightup(unsigned int pphysbase, unsigned int pmmio, printk(BIOS_SPEW, "decode edid returns %d\n", edid_ok); - dp_init_dim_regs(dp); + compute_display_params(dp); printk(BIOS_SPEW, "pixel_clock is %i, link_clock is %i\n", dp->edid.pixel_clock, dp->edid.link_clock); diff --git a/src/mainboard/google/slippy/gma.c b/src/mainboard/google/slippy/gma.c index 1e19912..f3316f4 100644 --- a/src/mainboard/google/slippy/gma.c +++ b/src/mainboard/google/slippy/gma.c @@ -214,21 +214,6 @@ void dp_init_dim_regs(struct intel_dp *dp) printk(BIOS_SPEW, "dp->flags = 0x%08x\n", dp->flags); } -int intel_dp_bw_code_to_link_rate(u8 link_bw); - -int intel_dp_bw_code_to_link_rate(u8 link_bw) -{ - switch (link_bw) { - case DP_LINK_BW_1_62: - default: - return 162000; - case DP_LINK_BW_2_7: - return 270000; - case DP_LINK_BW_5_4: - return 540000; - } -} - void mainboard_train_link(struct intel_dp *intel_dp) { u8 read_val;

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New patch to review for coreboot: 1186d0d rmodtool: correct final memory size calculation
by Aaron Durbin 26 Aug '14

26 Aug '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6767 -gerrit commit 1186d0d314a7aab1f0e7d6cefd373567105b22d8 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Aug 26 13:52:30 2014 -0500 rmodtool: correct final memory size calculation Apparently when I originally wrote this I confused myself to no end. The code/data of an rmodule has a set memory size which is associated with the .payload section. The relocation entries may increase the overall footprint of the memory size if the rmodule has no bss but a lot of relocations. Therefore, just compare relocation entries size plus the file size of the .payload section with the memory size of the paylod section. The .empty section is added only when we have not met the final target size. Change-Id: I5521dff048ae64a9b6e3c8f84a390eba37c7d0f5 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- util/cbfstool/rmodule.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/util/cbfstool/rmodule.c b/util/cbfstool/rmodule.c index a5730f1..95aff54 100644 --- a/util/cbfstool/rmodule.c +++ b/util/cbfstool/rmodule.c @@ -518,11 +518,11 @@ write_elf(const struct rmod_context *ctx, const struct buffer *in, * is considered a part of the program. */ total_size += buffer_size(&rmod_header); - total_size += ctx->phdr->p_memsz; - if (buffer_size(&relocs) + ctx->phdr->p_filesz > total_size) { - total_size -= ctx->phdr->p_memsz; + if (buffer_size(&relocs) + ctx->phdr->p_filesz > ctx->phdr->p_memsz) { total_size += buffer_size(&relocs); total_size += ctx->phdr->p_filesz; + } else { + total_size += ctx->phdr->p_memsz; } ret = add_section(ew, &rmod_header, ".header", addr,

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Patch merged into coreboot/master: 22d0ca0 armv7: Move Exynos from 'cpu' to 'soc'.
by gerrit＠coreboot.org 26 Aug '14

26 Aug '14

the following patch was just integrated into master: commit 22d0ca0ceb802675cdcab1472b8477066f729373 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Fri Sep 27 12:45:45 2013 +0800 armv7: Move Exynos from 'cpu' to 'soc'. The Exynos family and most ARM products are SoC, not just CPU. We used to put ARM code in src/cpu to avoid polluting the code base for what was essentially an experiment at the time. Now that it's past the experimental phase and we're going to see more SoCs (including intel/baytrail) in coreboot. Change-Id: I5ea1f822664244edf5f77087bc8018d7c535f81c Reviewed-on: https://chromium-review.googlesource.com/170891 Tested-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Ronald Minnich <rminnich(a)chromium.org> Commit-Queue: Hung-Te Lin <hungte(a)chromium.org> (cherry picked from commit c8bb8fe0b20be37465f93c738d80e7e43033670a) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> Reviewed-on: http://review.coreboot.org/6739 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/6739 for details. -gerrit

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Patch set updated for coreboot: b89610f util/intelgpio: Handy tool to build gpio.h from dumped values
by Edward O'Callaghan 26 Aug '14

26 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6762 -gerrit commit b89610fcfd0c976a96a4e3aa1cd014da1c7cfbf4 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Tue Aug 26 00:12:03 2014 +1000 util/intelgpio: Handy tool to build gpio.h from dumped values This purpose of this tool is to build the 'gpio.h' header from dumped values out of the inteltool. Change-Id: I2812a3546849347567efe71c714fefe39e02e5d7 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- .gitignore | 1 + util/intelgpio/Makefile | 47 ++++++++ util/intelgpio/dump_parse.c | 81 ++++++++++++++ util/intelgpio/intelgpio.c | 259 ++++++++++++++++++++++++++++++++++++++++++++ util/intelgpio/intelgpio.h | 52 +++++++++ 5 files changed, 440 insertions(+) diff --git a/.gitignore b/.gitignore index 203ad9a..0a05520 100644 --- a/.gitignore +++ b/.gitignore @@ -71,6 +71,7 @@ util/ifdtool/ifdtool util/ifdfake/ifdfake util/inteltool/.dependencies util/inteltool/inteltool +util/intelgpio/intelgpio util/k8resdump/k8resdump util/lbtdump/lbtdump util/mptable/mptable diff --git a/util/intelgpio/Makefile b/util/intelgpio/Makefile new file mode 100644 index 0000000..b09bca9 --- /dev/null +++ b/util/intelgpio/Makefile @@ -0,0 +1,47 @@ +# +# Makefile for intelgpio utility +# +# Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 2 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. +# + +PROGRAM = intelgpio + +CC ?= clang +INSTALL ?= /usr/bin/install +PREFIX ?= /usr/local +CFLAGS ?= -O2 -g -Wall -W +LDFLAGS += + +OBJS = intelgpio.o dump_parse.o + +all: $(PROGRAM) + +$(PROGRAM): $(OBJS) + $(CC) $(CFLAGS) -o $(PROGRAM) $(OBJS) $(LDFLAGS) + +clean: + rm -f $(PROGRAM) *.o *~ + +install: $(PROGRAM) + mkdir -p $(DESTDIR)$(PREFIX)/sbin + $(INSTALL) $(PROGRAM) $(DESTDIR)$(PREFIX)/sbin + mkdir -p $(DESTDIR)$(PREFIX)/share/man/man8 + $(INSTALL) -p -m644 $(PROGRAM).8 $(DESTDIR)$(PREFIX)/share/man/man8 + +.PHONY: all clean + +-include .dependencies diff --git a/util/intelgpio/dump_parse.c b/util/intelgpio/dump_parse.c new file mode 100644 index 0000000..ecac9f7 --- /dev/null +++ b/util/intelgpio/dump_parse.c @@ -0,0 +1,81 @@ +/* + * inteltool - Prepare gpio.h file from register dumps from inteltool. + * + * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <stdio.h> +#include <stdint.h> +#include <stdlib.h> + +#include "intelgpio.h" + +/** + * Parse a line out of a inteltool dump, NULL is returned when a line could + * not be parsed. + */ +static struct dump_tuple * parse_line(char * line) +{ + struct dump_tuple * row = NULL; + uint32_t addr, val; + + /* tokenizes line */ + if (sscanf(line, "0x%04x:", &addr) != 1) + return NULL; // if no address could be read + if (sscanf(line, "0x%08x", &val) != 1) + return NULL; // if no value could be read + + row = (struct dump_tuple *) malloc(sizeof(struct dump_tuple)); + row->address = addr; + row->registers = val; + row->next = NULL; + + return row; +} + +/** + * Returns a linked list of each row of the dump where each node is type + * struct dump_tuple. + */ +struct dump_tuple * process_stdin(FILE *fp) +{ + struct dump_tuple * head = NULL, * node = NULL; + char * line = NULL; + size_t len = 0; + + if (fp == NULL) + return NULL; + + while (getline(&line, &len, fp) != -1) { + if (head == NULL) { + head = parse_line(line); + node = head; + } + else { + node->next = parse_line(line); + node = node->next; + } + if (node == NULL) { + fprintf(stderr, "dump malformed!\n"); + exit(1); // FIXME: memory leak here, free-up linked-list ! + } + } + + if (line) + free(line); + + return head; +} diff --git a/util/intelgpio/intelgpio.c b/util/intelgpio/intelgpio.c new file mode 100644 index 0000000..53178fa --- /dev/null +++ b/util/intelgpio/intelgpio.c @@ -0,0 +1,259 @@ +/* + * inteltool - Prepare gpio.h file from register dumps from inteltool. + * + * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#define INTELGPIO_VERSION "0.1" + +#include <stdio.h> +#include <stdint.h> +#include <stdlib.h> +#include <getopt.h> + +#include "intelgpio.h" + +static const __attribute__((unused)) char *mode[] = {"MODE_NATIVE", "MODE_GPIO", "mode"}; +static const __attribute__((unused)) char *dir[] = {"DIR_OUTPUT", "DIR_INPUT", "direction"}; +static const __attribute__((unused)) char *invert[] = {"NO_INVERT", "GPIO_INVERT", "invert"}; +static const __attribute__((unused)) char *level[] = {"LEVEL_LOW", "LEVEL_HIGH", "level"}; +static const __attribute__((unused)) char *blink[] = {"NO_BLINK", "BLINK", "blink"}; +static const __attribute__((unused)) char *reset[] = {"RESET_PWROK", "RESET_RSMRST", "reset"}; + +static void print_version(void) +{ + printf("intelgpio v%s -- ", INTELGPIO_VERSION); + printf("Copyright (C) 2014 Edward O'Callaghan\n\n"); + printf( + "This program is free software: you can redistribute it and/or modify\n" + "it under the terms of the GNU General Public License as published by\n" + "the Free Software Foundation, version 2 of the License.\n\n" + "This program is distributed in the hope that it will be useful,\n" + "but WITHOUT ANY WARRANTY; without even the implied warranty of\n" + "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\n" + "GNU General Public License for more details.\n\n" + "You should have received a copy of the GNU General Public License\n" + "along with this program. If not, see <http://www.gnu.org/licenses/>.\n\n"); +} + +static void print_usage(const char *name) +{ + printf("usage: %s [-vh?sdmlia]\n", name); + printf("\n" + " -v | --version: print the version\n" + " -h | --help: print this help\n\n" + " -b | --boardname= name of mainboard\n" + " -s | --set= GPIO register set\n" + " -d | --direction= direction val\n" + " -m | --mode= mode val\n" + " -l | --level= level val\n" + " -i | --invert= invert val\n" + " -a | --all: all register sets 1,2,3\n" + "\n"); + exit(1); +} + +static void build_structs(const char *boardname) +{ + unsigned int set; + + for (set = 1; set < 4; set++) { + printf("const struct pch_gpio_map %s_gpio_map = {\n", boardname); + printf("\t.set%i = {\n", set); + printf("\t\t.mode\t\t= &pch_gpio_set%i_mode,\n", set); + printf("\t\t.direction\t= &pch_gpio_set%i_direction,\n", set); + printf("\t\t.level\t\t= &pch_gpio_set%i_level,\n", set); + if (set == 1) + printf("\t\t.invert\t\t= &pch_gpio_set%i_invert,\n", set); + printf("\t},\n"); + printf("};\n\n"); + } +} + +static void print_gpio_config(const char *type[], uint8_t set, uint32_t gpioval) { + unsigned int i; + uint8_t pin; +// char pin_flag; + + printf("const struct pch_gpio_set%i pch_gpio_set%i_%s = {\n", set, set, type[2]); + for (i = 0; i < 32; i++) { + pin = ((set - 1) * 32 + i); +// pin_flag = (pin < 10 ? ' ': '\0'); +// printf("\t.gpio%i%c = GPIO_%s,\n", pin, pin_flag + printf("\t.gpio%i = GPIO_%s,\n", pin + , type[(gpioval >> i) & 1]); + } + printf("};\n\n"); +} + +// TODO write to file.. or keep as stdout??? +static void write_gpio_header(uint8_t set, uint32_t mv, uint32_t dv, uint32_t lv, uint32_t iv) +{ + // TODO: check bounds on mode, dir, level & invert for sane values?? + print_gpio_config(mode, set, mv); + print_gpio_config(dir, set, dv); + print_gpio_config(level, set, lv); + if (set == 1) + print_gpio_config(invert, set, iv); +} + +static void build_header(struct dump_tuple * head, char * board_name) +{ + struct dump_tuple * node = head, * prev = NULL; + uint32_t direction1 = 0, mode1 = 0, level1 = 0, invert = 0; + uint32_t direction2 = 0, mode2 = 0, level2 = 0; + uint32_t direction3 = 0, mode3 = 0, level3 = 0; + uint32_t blink = 0; + + if (board_name != NULL) { + printf("#ifndef %s_GPIO_H\n", board_name); + printf("#define %s_GPIO_H\n\n", board_name); + } else { + printf("#ifndef GENERIC_GPIO_H\n"); + printf("#define GENERIC_GPIO_H\n\n"); + } + +// FIXME: convert switch to const array map for lookups. + while (node != NULL) { + switch(node->address) { + case GPIO_USE_SEL: + mode1 = node->registers; + break; + case GP_IO_SEL: + direction1 = node->registers; + break; + case GP_LVL: + level1 = node->registers; + break; + case GPO_BLINK: + blink = node->registers; // TODO.. + break; + case GPI_INV: + invert = node->registers; + break; + case GPIO_USE_SEL2: + mode2 = node->registers; + break; + case GP_IO_SEL2: + direction2 = node->registers; + break; + case GP_LVL2: + level2 = node->registers; + break; + case GPIO_USE_SEL3: + mode3 = node->registers; + break; + case GP_IO_SEL3: + direction3 = node->registers; + break; + case GP_LVL3: + level3 = node->registers; + break; + default: + fprintf(stderr, "Unknown GPIO address of 0x%04x\n", node->address); + break; + } + prev = node; + node = node->next; + free(prev); + } + + write_gpio_header(1, mode1, direction1, level1, invert); + write_gpio_header(2, mode2, direction2, level2, 0); + write_gpio_header(3, mode3, direction3, level3, 0); + + if (board_name != NULL) { + build_structs(board_name); + } else { + build_structs("generic"); + } + printf("#endif\n"); +} + +int main(int argc, char *argv[]) +{ + int opt, option_index = 0; + uint8_t dump_set = 0, dump_all_sets = 0; + uint32_t direction = 0, mode = 0, level = 0, invert = 0; + char * mainboard_name = NULL; + struct dump_tuple * head = NULL; + + static struct option long_options[] = { + {"version", no_argument, 0, 'v'}, + {"help", no_argument, 0, 'h'}, + {"set", required_argument, 0, 's'}, + {"boardname", optional_argument, 0, 'b'}, + {"direction", required_argument, 0, 'd'}, + {"mode", required_argument, 0, 'm'}, + {"level", required_argument, 0, 'l'}, + {"invert", required_argument, 0, 'i'}, + {"all", 0, 0, 'a'}, + {0, 0, 0, 0} + }; + + while ((opt = getopt_long(argc, argv, "vh?b:s:d:m:l:i:a", + long_options, &option_index)) != EOF) { + switch (opt) { + case 'v': + print_version(); + exit(0); + break; + case 'b': + mainboard_name = optarg; + break; + case 's': + dump_set = atoi(optarg); + break; + case 'd': + direction = strtol(optarg, NULL, 16); + break; + case 'm': + mode = strtol(optarg, NULL, 16); + break; + case 'l': + level = strtol(optarg, NULL, 16); + break; + case 'i': + invert = strtol(optarg, NULL, 16); + break; + case 'a': + dump_all_sets = 1; + break; + case 'h': + case '?': + default: + print_usage(argv[0]); + exit(0); + break; + } + } + + if (dump_all_sets) { + head = process_stdin(stdin); + build_header(head, mainboard_name); + } + + +// FIXME: check if mode, direction, level and invert were /all/ set.. + if ((dump_set >= 1) && (dump_set <= 3)) { + write_gpio_header(dump_set, mode, direction, level, invert); + } else if (!dump_all_sets) { + print_usage(argv[0]); + exit(0); + } + + return 0; +} diff --git a/util/intelgpio/intelgpio.h b/util/intelgpio/intelgpio.h new file mode 100644 index 0000000..a7544b3 --- /dev/null +++ b/util/intelgpio/intelgpio.h @@ -0,0 +1,52 @@ +/* + * inteltool - Prepare gpio.h file from register dumps from inteltool. + * + * Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#ifndef _INTELGPIO_H +#define _INTELGPIO_H + +#include <stdint.h> + +/* ICH7 GPIOBASE */ +#define GPIO_USE_SEL 0x00 +#define GP_IO_SEL 0x04 +#define GP_LVL 0x0c +#define GPO_BLINK 0x18 +#define GPI_INV 0x2c +#define GPIO_USE_SEL2 0x30 +#define GP_IO_SEL2 0x34 +#define GP_LVL2 0x38 +#define GPIO_USE_SEL3 0x40 +#define GP_IO_SEL3 0x44 +#define GP_LVL3 0x48 +#define GP_RST_SEL1 0x60 +#define GP_RST_SEL2 0x64 +#define GP_RST_SEL3 0x68 + + +struct dump_tuple; + +struct dump_tuple { + uint32_t address; + uint32_t registers; + struct dump_tuple * next; +}; + +struct dump_tuple * process_stdin(FILE *fp); + +#endif /* _INTELGPIO_H */

1 0

Patch set updated for coreboot: 636e111 util/inteltool: Allow GPIO dumps to be in binary map format
by Edward O'Callaghan 26 Aug '14

26 Aug '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6763 -gerrit commit 636e1111de642e528ba2b3caebca1fdb153e9f9d Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Tue Aug 26 04:36:26 2014 +1000 util/inteltool: Allow GPIO dumps to be in binary map format Essentially we wish to have the machine parse the GPIO dump in other tools (sic intelgpio) and generate source based off the dumped map. Change-Id: I06a2777e6ea3a90bf509c323496b5980d06071ad Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- util/inteltool/gpio.c | 54 +++++++++++++++++++++++++++++++++------------- util/inteltool/inteltool.c | 33 ++++++++++++++++++---------- util/inteltool/inteltool.h | 2 +- 3 files changed, 62 insertions(+), 27 deletions(-) diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c index 49c1325..abbccf0 100644 --- a/util/inteltool/gpio.c +++ b/util/inteltool/gpio.c @@ -333,24 +333,45 @@ static const gpio_default_t pp_pch_mobile_defaults[] = { static uint16_t gpiobase; -static void print_reg(const io_register_t *const reg) +static void dump_reg(const io_register_t *const reg) { switch (reg->size) { case 4: - printf("gpiobase+0x%04x: 0x%08x (%s)\n", - reg->addr, inl(gpiobase+reg->addr), reg->name); + printf("0x%04x: 0x%08x\n", + reg->addr, inl(gpiobase+reg->addr)); break; case 2: - printf("gpiobase+0x%04x: 0x%04x (%s)\n", - reg->addr, inw(gpiobase+reg->addr), reg->name); + printf("0x%04x: 0x%04x\n", + reg->addr, inw(gpiobase+reg->addr)); break; case 1: - printf("gpiobase+0x%04x: 0x%02x (%s)\n", - reg->addr, inb(gpiobase+reg->addr), reg->name); + printf("0x%04x: 0x%02x\n", + reg->addr, inb(gpiobase+reg->addr)); break; } } +static void print_reg(const io_register_t *const reg, int dump) +{ + if (dump) + dump_reg(reg); + else + switch (reg->size) { + case 4: + printf("gpiobase+0x%04x: 0x%08x (%s)\n", + reg->addr, inl(gpiobase+reg->addr), reg->name); + break; + case 2: + printf("gpiobase+0x%04x: 0x%04x (%s)\n", + reg->addr, inw(gpiobase+reg->addr), reg->name); + break; + case 1: + printf("gpiobase+0x%04x: 0x%02x (%s)\n", + reg->addr, inb(gpiobase+reg->addr), reg->name); + break; + } +} + static uint32_t get_diff(const io_register_t *const reg, const uint32_t def) { uint32_t gpio_diff = 0; @@ -393,17 +414,19 @@ static void print_diff(const io_register_t *const reg, } } -int print_gpios(struct pci_dev *sb, int show_all, int show_diffs) +int print_gpios(struct pci_dev *sb, int show_all, int show_diffs, int bin_dump) { int i, j, size, defaults_size = 0; const io_register_t *gpio_registers; const gpio_default_t *gpio_defaults = NULL; uint32_t gpio_diff; - if (show_diffs && !show_all) - printf("\n========== GPIO DIFFS ===========\n\n"); - else - printf("\n============= GPIOS =============\n\n"); + if (!bin_dump) { + if (show_diffs && !show_all) + printf("\n========== GPIO DIFFS ===========\n\n"); + else + printf("\n============= GPIOS =============\n\n"); + } switch (sb->device_id) { case PCI_DEVICE_ID_INTEL_Z68: @@ -556,12 +579,13 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs) return 1; } - printf("GPIOBASE = 0x%04x (IO)\n\n", gpiobase); + if (!bin_dump) + printf("GPIOBASE = 0x%04x (IO)\n\n", gpiobase); j = 0; for (i = 0; i < size; i++) { if (show_all) - print_reg(&gpio_registers[i]); + print_reg(&gpio_registers[i], bin_dump); if (show_diffs && (j < defaults_size) && @@ -570,7 +594,7 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs) gpio_defaults[j].def); if (gpio_diff) { if (!show_all) - print_reg(&gpio_registers[i]); + print_reg(&gpio_registers[i], bin_dump); print_diff(&gpio_registers[i], gpio_defaults[j].def, gpio_diff); if (!show_all) diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index c6e2a67..4745a68 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -203,6 +203,7 @@ void print_usage(const char *name) printf("\n" " -v | --version: print the version\n" " -h | --help: print this help\n\n" + " -b | --gpios-bin: dump soutbridge GPIO registers in binary format\n" " -g | --gpio: dump soutbridge GPIO registers\n" " -G | --gpio-diffs: show GPIO differences from defaults\n" " -r | --rcba: dump soutbridge RCBA registers\n" @@ -227,7 +228,7 @@ int main(int argc, char *argv[]) char *sbname = "unknown", *nbname = "unknown"; - int dump_gpios = 0, dump_mchbar = 0, dump_rcba = 0; + int dump_gpios = 0, dump_gpios_bin = 0, dump_mchbar = 0, dump_rcba = 0; int dump_pmbase = 0, dump_epbar = 0, dump_dmibar = 0; int dump_pciexbar = 0, dump_coremsrs = 0, dump_ambs = 0; int show_gpio_diffs = 0; @@ -235,6 +236,7 @@ int main(int argc, char *argv[]) static struct option long_options[] = { {"version", 0, 0, 'v'}, {"help", 0, 0, 'h'}, + {"gpios-bin", 0, 0, 'b'}, {"gpios", 0, 0, 'g'}, {"gpio-diffs", 0, 0, 'G'}, {"mchbar", 0, 0, 'm'}, @@ -249,13 +251,16 @@ int main(int argc, char *argv[]) {0, 0, 0, 0} }; - while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMaA", + while ((opt = getopt_long(argc, argv, "vh?bgGrpmedPMaA", long_options, &option_index)) != EOF) { switch (opt) { case 'v': print_version(); exit(0); break; + case 'b': + dump_gpios_bin = 1; + break; case 'g': dump_gpios = 1; break; @@ -377,9 +382,11 @@ int main(int argc, char *argv[]) * left-shifted "Extended Model" fields. * http://download.intel.com/design/processor/applnots/24161832.pdf */ - printf("CPU: ID 0x%x, Processor Type 0x%x, Family 0x%x, Model 0x%x, Stepping 0x%x\n", - id, (id >> 12) & 0x3, ((id >> 8) & 0xf) + ((id >> 20) & 0xff), - ((id >> 12) & 0xf0) + ((id >> 4) & 0xf), (id & 0xf)); + if (!dump_gpios_bin) { + printf("CPU: ID 0x%x, Processor Type 0x%x, Family 0x%x, Model 0x%x, Stepping 0x%x\n", + id, (id >> 12) & 0x3, ((id >> 8) & 0xf) + ((id >> 20) & 0xff), + ((id >> 12) & 0xf0) + ((id >> 4) & 0xf), (id & 0xf)); + } /* Determine names */ for (i = 0; i < ARRAY_SIZE(supported_chips_list); i++) @@ -389,19 +396,23 @@ int main(int argc, char *argv[]) if (sb->device_id == supported_chips_list[i].device_id) sbname = supported_chips_list[i].name; - printf("Northbridge: %04x:%04x (%s)\n", - nb->vendor_id, nb->device_id, nbname); + if (!dump_gpios_bin) { + printf("Northbridge: %04x:%04x (%s)\n", + nb->vendor_id, nb->device_id, nbname); - printf("Southbridge: %04x:%04x (%s)\n", - sb->vendor_id, sb->device_id, sbname); + printf("Southbridge: %04x:%04x (%s)\n", + sb->vendor_id, sb->device_id, sbname); + } /* Now do the deed */ if (dump_gpios) { - print_gpios(sb, 1, show_gpio_diffs); + print_gpios(sb, 1, show_gpio_diffs, 0); printf("\n\n"); + } else if (dump_gpios_bin) { + print_gpios(sb, 1, show_gpio_diffs, 1); } else if (show_gpio_diffs) { - print_gpios(sb, 0, show_gpio_diffs); + print_gpios(sb, 0, show_gpio_diffs, 0); printf("\n\n"); } diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index a06c70d..4edbff2 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -185,7 +185,7 @@ int print_intel_core_msrs(void); int print_mchbar(struct pci_dev *nb, struct pci_access *pacc); int print_pmbase(struct pci_dev *sb, struct pci_access *pacc); int print_rcba(struct pci_dev *sb); -int print_gpios(struct pci_dev *sb, int show_all, int show_diffs); +int print_gpios(struct pci_dev *sb, int show_all, int show_diffs, int bin_dump); int print_epbar(struct pci_dev *nb); int print_dmibar(struct pci_dev *nb); int print_pciexbar(struct pci_dev *nb);

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Patch merged into coreboot/master: b123e0d util/inteltool: fix typo
by gerrit＠coreboot.org 26 Aug '14

26 Aug '14

the following patch was just integrated into master: commit b123e0d3345554d7e93361bb4511a53bc95d41a1 Author: Idwer Vollering <vidwer(a)gmail.com> Date: Mon Aug 25 23:59:42 2014 +0200 util/inteltool: fix typo Change-Id: I8c30742f6cd759dce4c9641edad107d9e3154975 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Reviewed-on: http://review.coreboot.org/6766 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/6766 for details. -gerrit

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Patch merged into coreboot/master: 4c8465c Peppy, Haswell: refactor and create set_translation_table function in haswell/gma.c
by gerrit＠coreboot.org 26 Aug '14

26 Aug '14

the following patch was just integrated into master: commit 4c8465cfac3a5b4bdc61e0f2f0bfb0b346b03ad2 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Mon Sep 30 15:57:21 2013 -0700 Peppy, Haswell: refactor and create set_translation_table function in haswell/gma.c The code to set the graphics translation table has been in the mainboards, but should be in the northbridge support code. Move the function, give it a better name, and enable support for > 4 GiB while we're at it, in the remote possibility that we get some 8 GiB haswell boards. Change-Id: I72b4a0a88e53435e00d9b5e945479a51bd205130 Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> Reviewed-on: https://chromium-review.googlesource.com/171160 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Commit-Queue: Ronald Minnich <rminnich(a)chromium.org> Tested-by: Ronald Minnich <rminnich(a)chromium.org> (cherry picked from commit d5a429498147c479eb51477927e146de809effce) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> Reviewed-on: http://review.coreboot.org/6741 Tested-by: build bot (Jenkins) See http://review.coreboot.org/6741 for details. -gerrit

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coreboot-gerrit August 2014