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Michał Żygowski has uploaded a new patch set (#5) to the change originally created by Maciej Pijanowski. ( https://review.coreboot.org/c/flashrom/+/83854?usp=email )
Change subject: ichspi: Add RaptorPoint PCH support
......................................................................
ichspi: Add RaptorPoint PCH support
Based on public Intel 700 Series PCH datasheet, DOC 743835 rev 004.
The IDs of IoT chipset SKUs (ending with E) can only be found in "12th Gen Intel® Core™ Processors Family (Formerly Known as Alder Lake -S) for IoT Platforms External Design Specification (EDS) Addendum" DOC 634528 rev 2.7 (NDA).
TEST=Probe flash on Z790 chipset. Run the ich_descriptors_tool and check output is correct as expected.
Change-Id: I13ac52d5400c0e2260e12d605077fc2182c379ef
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M chipset_enable.c
M doc/release_notes/devel.rst
M ich_descriptors.c
M ichspi.c
M include/programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
6 files changed, 45 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/83854/5
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Change subject: ichspi: Add RaptorPoint PCH support
......................................................................
Patch Set 4:
(1 comment)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/83854/comment/c9686b0d_d4ab1bc3?us… :
PS4, Line 2209: {0x8086, 0x7a90, B_S, NT, "Intel", "R680E", enable_flash_pch600},
: {0x8086, 0x7a91, B_S, NT, "Intel", "Q670E", enable_flash_pch600},
: {0x8086, 0x7a92, B_S, NT, "Intel", "H610E", enable_flash_pch600}
> Thanks for ref to the doc! I found one https://cdrdv2-public.intel.com/743835/743835-004.pdf […]
The chipsets ending with 'E' are IoT SKUs. There is a different datasheet (or specification update) for them. Could not find the IDs in public datasheets (only chipset names are mentioned there withotu IDs). The IDs can be found only in "12th Gen Intel® Core™ Processors Family (Formerly Known as Alder Lake -S) for IoT Platforms External Design Specification (EDS) Addendum" DOC 634528 rev 2.7 (NDA)
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Change subject: ichspi: Add RaptorPoint PCH support
......................................................................
Patch Set 4:
(4 comments)
Patchset:
PS3:
> Added the relevant datasheet to the commit message. […]
Done
PS3:
> Added
Done
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/83854/comment/1f2f6713_7a968aa5?us… :
PS4, Line 2209: {0x8086, 0x7a90, B_S, NT, "Intel", "R680E", enable_flash_pch600},
: {0x8086, 0x7a91, B_S, NT, "Intel", "Q670E", enable_flash_pch600},
: {0x8086, 0x7a92, B_S, NT, "Intel", "H610E", enable_flash_pch600}
Thanks for ref to the doc! I found one https://cdrdv2-public.intel.com/743835/743835-004.pdf
I found all the device IDs there, but except of first 3 (0x7a90, 0x7a91, 0x7a92). But the doc says "volume 1 of 2", maybe they are in the volume 2?
It's fine to add from a doc which is not fully public, if you have such doc. If you can check that IDs still exist (since you mentioned in the other one that 0x7a8a was cancelled and later reused).
File util/ich_descriptors_tool/ich_descriptors_tool.c:
https://review.coreboot.org/c/flashrom/+/83854/comment/0951b79d_5c913e7d?us… :
PS3, Line 142: "\t- \"600\" or \"alder\" for Intel's 600 series chipsets.\n"
Oh sorry, I said it in a confusing way! No, you don't need to add the output of the tool to commit message.
I meant to add something like this in commit message:
> Updated ich_descriptors_tool to handle chipset name raptor, run the tool, output is correct as expected
The tool has its own build file, and can be run separately, so I wanted to mention in commit message that you did it and it works.
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Change subject: Ensure verify operation completed in full if chip memory modified
......................................................................
Patch Set 3: Code-Review+2
(1 comment)
Patchset:
PS3:
I'm very pleased that this found a bug that we can fix!
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Change subject: ichspi: Add RaptorPoint PCH support
......................................................................
Patch Set 4:
(3 comments)
Patchset:
PS3:
> Could you please add this to document `/release_notes/devel. […]
Added
PS3:
> Thank you for adding support! […]
Added the relevant datasheet to the commit message.
Yes, we have been flashing SPI on Z790 chipset for quite some time, no problems detected.
File util/ich_descriptors_tool/ich_descriptors_tool.c:
https://review.coreboot.org/c/flashrom/+/83854/comment/44876621_4f1d6ce4?us… :
PS3, Line 142: "\t- \"600\" or \"alder\" for Intel's 600 series chipsets.\n"
> Could you please add raptor here? And then run the tool, select this new option, and add the result […]
Added the missing raptor.
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Attention is currently required from: Krystian Hebel, Maciej Pijanowski, Michał Kopeć, Sergii Dmytruk.
Michał Żygowski has uploaded a new patch set (#4) to the change originally created by Maciej Pijanowski. ( https://review.coreboot.org/c/flashrom/+/83854?usp=email )
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: ichspi: Add RaptorPoint PCH support
......................................................................
ichspi: Add RaptorPoint PCH support
Based on public Intel 700 Series PCH datasheet, DOC 743835 rev 004.
TEST=Probe flash on Z790 chipset
Change-Id: I13ac52d5400c0e2260e12d605077fc2182c379ef
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M chipset_enable.c
M doc/release_notes/devel.rst
M ich_descriptors.c
M ichspi.c
M include/programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
6 files changed, 45 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/83854/4
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Change subject: Ensure verify operation completed in full if chip memory modified
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
I made all the tests work! This is ready for review!
To handle test case #19 , setup_chip now returns the end boundary (offset) of how far we need to do verification. Which is in most cases 16 bytes (size of mock chip), however #19 has logical layout which does not cover the full chip. We only go as far as logical layout is configured.
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Hello Aarya, Peter Marheine, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/84078?usp=email
to look at the new patch set (#3).
The following approvals got outdated and were removed:
Verified-1 by build bot (Jenkins)
Change subject: Ensure verify operation completed in full if chip memory modified
......................................................................
Ensure verify operation completed in full if chip memory modified
The patch adds new functionality to the test: tracking the areas of
chip memory that were modified (i.e. by erase or write operation),
and then checking those areas were completely covered by verify
operation.
The test operates over the mock chip memory of 16 bytes, so it is
possible to track each byte which was modified, and assert that is
has been verified afterwards.
Adding the test found a bug which is fixed in this commit:
Post-cleanup after processing unaligned region for the case when end
region needs to be extended to align with erase block. Writing was
done correctly, but post-processing of newcontents could cause
one-off offset at the end of the region, which would make
verification appear false-negative (see test cases #16-19).
Change-Id: I3c5d55a0deb20f23f4072caac8c0dce04cc98fd4
Signed-off-by: Anastasia Klimchuk <aklm(a)flashrom.org>
---
M erasure_layout.c
M tests/erase_func_algo.c
2 files changed, 138 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/84078/3
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