May 2023 - flashrom-gerrit - mail.coreboot.org

[M] Change in flashrom[master]: ni845x_spi: support building with Meson
by Anastasia Klimchuk (Code Review) 14 May '23

14 May '23

Attention is currently required from: Miklós Márton, Thomas Heijligen, Peter Marheine. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/74963 ) Change subject: ni845x_spi: support building with Meson ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Miklos, what do you think about it? Thanks! -- To view, visit https://review.coreboot.org/c/flashrom/+/74963 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I90e85c424f97898b47bf0a3d78672d6c25af12b0 Gerrit-Change-Number: 74963 Gerrit-PatchSet: 3 Gerrit-Owner: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alexander Goncharov <chat(a)joursoir.net> Gerrit-CC: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Miklós Márton <martonmiklosqdev(a)gmail.com> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Comment-Date: Sun, 14 May 2023 08:15:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in flashrom[master]: flashrom.c: Enable erase path optimisation
by Anastasia Klimchuk (Code Review) 14 May '23

14 May '23

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/74872 ) Change subject: flashrom.c: Enable erase path optimisation ...................................................................... flashrom.c: Enable erase path optimisation Set the use_legacy_erase_path flag to false to enable erase path optimisation by default. Change-Id: Ie13e43b18b20dbb956b569e554953a19eb32ea22 Signed-off-by: Aarya Chaumal <aarya.chaumal(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74872 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> --- M flashrom.c 1 file changed, 17 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Anastasia Klimchuk: Looks good to me, approved diff --git a/flashrom.c b/flashrom.c index faffe51..19afb54 100644 --- a/flashrom.c +++ b/flashrom.c @@ -35,7 +35,7 @@ #include "chipdrivers.h" #include "erasure_layout.h" -static bool use_legacy_erase_path = true; +static bool use_legacy_erase_path = false; const char flashrom_version[] = FLASHROM_VERSION; -- To view, visit https://review.coreboot.org/c/flashrom/+/74872 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie13e43b18b20dbb956b569e554953a19eb32ea22 Gerrit-Change-Number: 74872 Gerrit-PatchSet: 5 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: flashrom.c: Enable erase path optimisation
by Anastasia Klimchuk (Code Review) 14 May '23

14 May '23

Attention is currently required from: Simon Buhrow, Thomas Heijligen, Edward O'Callaghan, Aarya, Nikolai Artemiev. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/74872 ) Change subject: flashrom.c: Enable erase path optimisation ...................................................................... Patch Set 4: (1 comment) Patchset: PS3: > Thomas, Simon, are you fine to enable optimisations by default? So you plan to do any more testing? Okay I resolve this, and let's merge the patch. It's easier to continue the testing on head, and also in case of emergency we have an easy way to disable back, -- To view, visit https://review.coreboot.org/c/flashrom/+/74872 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie13e43b18b20dbb956b569e554953a19eb32ea22 Gerrit-Change-Number: 74872 Gerrit-PatchSet: 4 Gerrit-Owner: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Simon Buhrow Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Simon Buhrow Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Aarya <aarya.chaumal(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Sun, 14 May 2023 08:05:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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[M] Change in flashrom[master]: doc: Add doc how to add docs
by Anastasia Klimchuk (Code Review) 14 May '23

14 May '23

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/74225 ) Change subject: doc: Add doc how to add docs ...................................................................... doc: Add doc how to add docs Change-Id: I356a286ad2f3334392efadda366b0ca0f8042752 Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-on: https://review.coreboot.org/c/flashrom/+/74225 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Alexander Goncharov <chat(a)joursoir.net> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- A doc/how_to_add_docs.rst M doc/index.rst 2 files changed, 50 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Alexander Goncharov: Looks good to me, but someone else must approve diff --git a/doc/how_to_add_docs.rst b/doc/how_to_add_docs.rst new file mode 100644 index 0000000..0b32acb --- /dev/null +++ b/doc/how_to_add_docs.rst @@ -0,0 +1,35 @@ +How to add or update docs +========================= + +To add or update a documentation page, you need to create or modify +an ``.rst`` file in the ``/doc`` directory and send a patch for +review. + +People who are registered in MAINTAINERS file for doc/ directory will +be automatically added to the patch as reviewers. However, you are +very welcome to add more reviewers who know the subject. In fact, it +is always a good idea to add someone who has knowledge of the specific +area you are documenting. + +We are using Sphinx doc engine for documentation (see +https://www.sphinx-doc.org/) and reStructured Text format for content. +reStructuredText Primer page has more details +https://www.sphinx-doc.org/en/master/usage/restructuredtext/basics.html#restructuredtext-primer + +Brand new page needs to be added to the appropriate ``index.rst`` file +under ``/doc`` directory (that could be a root index file or nested one). + +To test your changes, build flashrom with documentation and open +generated ``.html`` file in the browser. Generated ``.html`` files are +in meson ``builddir/doc/html`` directory. + +Misc questions +-------------- + +* We use CC-BY-4.0 license for documentation. +* Writing style can be formal or informal, it's mostly up to you, the + important thing is to make the text clear, readable and unambiguous. You + can insert images if this really helps the readers to understand the + instructions. +* Documentation should be relevant to either flashrom usage or flashrom + development diff --git a/doc/index.rst b/doc/index.rst index 326f684..e6dcc4d 100644 --- a/doc/index.rst +++ b/doc/index.rst @@ -9,5 +9,6 @@ dev_guide/index classic_cli_manpage contact + how_to_add_docs .. include:: ../README.rst -- To view, visit https://review.coreboot.org/c/flashrom/+/74225 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I356a286ad2f3334392efadda366b0ca0f8042752 Gerrit-Change-Number: 74225 Gerrit-PatchSet: 7 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in flashrom[master]: jlink_spi: add cs=tms option to jlink_spi programmer
by Anastasia Klimchuk (Code Review) 14 May '23

14 May '23

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/75011 ) Change subject: jlink_spi: add cs=tms option to jlink_spi programmer ...................................................................... jlink_spi: add cs=tms option to jlink_spi programmer Currently, the code assumes the nCS pin of spi nor flash is connected to either nRESET(pin 15) or nTRST(pin 3). But it is incompatible with the pinout from official JFlash SPI, whereas the nCS pin is wired to TMS(pin 7). This commit adds cs=tms option to share the same pinout as JFlash SPI. It works by toggling TMS in assert_cs and deassert_cs, and sets TMS to zero in jlink_spi_send_command. The default option is set to cs=reset for backward compatibility. Tested on macOS 13.3.1 with JLink and Winbond W25Q128 Change-Id: I0cb467fcc2c403a25f260462de0cd020e7022bb1 Signed-off-by: Jiajie Chen <c(a)jia.je> Reviewed-on: https://review.coreboot.org/c/flashrom/+/75011 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-by: Alexander Goncharov <chat(a)joursoir.net> --- M doc/classic_cli_manpage.rst M jlink_spi.c 2 files changed, 69 insertions(+), 15 deletions(-) Approvals: build bot (Jenkins): Verified Anastasia Klimchuk: Looks good to me, approved Alexander Goncharov: Looks good to me, approved diff --git a/doc/classic_cli_manpage.rst b/doc/classic_cli_manpage.rst index 45ef4aa..a8ac6da 100644 --- a/doc/classic_cli_manpage.rst +++ b/doc/classic_cli_manpage.rst @@ -1066,7 +1066,7 @@ flashrom -p jlink_spi:cs=pin -syntax where ``pin`` can be either ``TRST`` or ``RESET``. The default pin for chip select is ``RESET``. +syntax where ``pin`` can be either ``TRST``, ``RESET`` or ``TMS``. The default pin for chip select is ``RESET``. Note that, when using ``RESET``, it is normal that the indicator LED blinks orange or red. Additionally, the ``Tref`` pin of the programmer must be attached to the logic level of the flash chip. @@ -1079,7 +1079,7 @@ | 1 2 | 1: VTref 2: | 3 4 | 3: TRST 4: GND | 5 6 | 5: TDI 6: GND - +-+ 7 8 | 7: 8: GND + +-+ 7 8 | 7: TMS 8: GND | 9 10 | 9: TCK 10: GND | 11 12 | 11: 12: GND +-+ 13 14 | 13: TDO 14: diff --git a/jlink_spi.c b/jlink_spi.c index af61fb5..447629c 100644 --- a/jlink_spi.c +++ b/jlink_spi.c @@ -51,10 +51,16 @@ /* Minimum target voltage required for operation in mV. */ #define MIN_TARGET_VOLTAGE 1200 +enum cs_wiring { + CS_RESET, /* nCS is wired to nRESET(pin 15) */ + CS_TRST, /* nCS is wired to nTRST(pin 3) */ + CS_TMS, /* nCS is wired to TMS/nCS(pin 7) */ +}; + struct jlink_spi_data { struct jaylink_context *ctx; struct jaylink_device_handle *devh; - bool reset_cs; + enum cs_wiring cs; bool enable_target_power; }; @@ -62,20 +68,27 @@ { int ret; - if (jlink_data->reset_cs) { + if (jlink_data->cs == CS_RESET) { ret = jaylink_clear_reset(jlink_data->devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_clear_reset() failed: %s.\n", jaylink_strerror(ret)); return false; } - } else { + } else if (jlink_data->cs == CS_TRST) { ret = jaylink_jtag_clear_trst(jlink_data->devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_jtag_clear_trst() failed: %s.\n", jaylink_strerror(ret)); return false; } + } else { + ret = jaylink_jtag_clear_tms(jlink_data->devh); + + if (ret != JAYLINK_OK) { + msg_perr("jaylink_jtag_clear_tms() failed: %s.\n", jaylink_strerror(ret)); + return false; + } } return true; @@ -85,20 +98,27 @@ { int ret; - if (jlink_data->reset_cs) { + if (jlink_data->cs == CS_RESET) { ret = jaylink_set_reset(jlink_data->devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_set_reset() failed: %s.\n", jaylink_strerror(ret)); return false; } - } else { + } else if (jlink_data->cs == CS_TRST) { ret = jaylink_jtag_set_trst(jlink_data->devh); if (ret != JAYLINK_OK) { msg_perr("jaylink_jtag_set_trst() failed: %s.\n", jaylink_strerror(ret)); return false; } + } else { + ret = jaylink_jtag_set_tms(jlink_data->devh); + + if (ret != JAYLINK_OK) { + msg_perr("jaylink_jtag_set_tms() failed: %s.\n", jaylink_strerror(ret)); + return false; + } } return true; @@ -109,6 +129,7 @@ { uint32_t length; uint8_t *buffer; + static const uint8_t zeros[JTAG_MAX_TRANSFER_SIZE] = {0}; struct jlink_spi_data *jlink_data = flash->mst->spi.data; length = writecnt + readcnt; @@ -133,10 +154,13 @@ return SPI_PROGRAMMER_ERROR; } + /* If CS is wired to TMS, TMS should remain zero. */ + const uint8_t *tms_buffer = jlink_data->cs == CS_TMS ? zeros : buffer; + int ret; ret = jaylink_jtag_io(jlink_data->devh, - buffer, buffer, buffer, length * 8, JAYLINK_JTAG_VERSION_2); + tms_buffer, buffer, buffer, length * 8, JAYLINK_JTAG_VERSION_2); if (ret != JAYLINK_OK) { msg_perr("jaylink_jtag_io() failed: %s.\n", jaylink_strerror(ret)); @@ -196,7 +220,7 @@ unsigned long speed = 0; struct jaylink_context *jaylink_ctx = NULL; struct jaylink_device_handle *jaylink_devh = NULL; - bool reset_cs; + enum cs_wiring cs; struct jlink_spi_data *jlink_data = NULL; bool enable_target_power; @@ -255,14 +279,16 @@ free(arg); - reset_cs = true; + cs = CS_RESET; arg = extract_programmer_param_str(cfg, "cs"); if (arg) { if (!strcasecmp(arg, "reset")) { - reset_cs = true; + cs = CS_RESET; } else if (!strcasecmp(arg, "trst")) { - reset_cs = false; + cs = CS_TRST; + } else if (!strcasecmp(arg, "tms")) { + cs = CS_TMS; } else { msg_perr("Invalid chip select pin specified: '%s'.\n", arg); free(arg); @@ -272,10 +298,12 @@ free(arg); - if (reset_cs) + if (cs == CS_RESET) msg_pdbg("Using RESET as chip select signal.\n"); - else + else if (cs == CS_TRST) msg_pdbg("Using TRST as chip select signal.\n"); + else + msg_pdbg("Using TMS/CS as chip select signal.\n"); enable_target_power = false; arg = extract_programmer_param_str(cfg, "power"); @@ -506,7 +534,7 @@ /* jaylink_ctx, jaylink_devh are allocated by jaylink_init and jaylink_open */ jlink_data->ctx = jaylink_ctx; jlink_data->devh = jaylink_devh; - jlink_data->reset_cs = reset_cs; + jlink_data->cs = cs; jlink_data->enable_target_power = enable_target_power; /* Ensure that the CS signal is not active initially. */ -- To view, visit https://review.coreboot.org/c/flashrom/+/75011 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I0cb467fcc2c403a25f260462de0cd020e7022bb1 Gerrit-Change-Number: 75011 Gerrit-PatchSet: 6 Gerrit-Owner: Chen <c(a)jia.je> Gerrit-Reviewer: Alexander Goncharov <chat(a)joursoir.net> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in flashrom[master]: meson_options.txt: Unquote true
by Angel Pons (Code Review) 13 May '23

13 May '23

Attention is currently required from: Thomas Heijligen. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/75149 ) Change subject: meson_options.txt: Unquote true ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/75149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib3a46112678098ff3b2e92c44cf4539089216106 Gerrit-Change-Number: 75149 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Sat, 13 May 2023 17:54:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: meson.build: enable serial programmer on Windows.
by Angel Pons (Code Review) 13 May '23

13 May '23

Attention is currently required from: Thomas Heijligen. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/75170 ) Change subject: meson.build: enable serial programmer on Windows. ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/75170/comment/beaa41bb_3ddf5489 PS3, Line 7: . nit: no period -- To view, visit https://review.coreboot.org/c/flashrom/+/75170 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie60a25a9305374f9ed84a38f2650d517ec094387 Gerrit-Change-Number: 75170 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Sat, 13 May 2023 17:53:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in flashrom[master]: meson.build: enable serial programmer on Windows.
by Thomas Heijligen (Code Review) 13 May '23

13 May '23

Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/75170 ) Change subject: meson.build: enable serial programmer on Windows. ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/75170/comment/3a3f4647_28ac9cc2 PS1, Line 7: w > typo: d Done -- To view, visit https://review.coreboot.org/c/flashrom/+/75170 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie60a25a9305374f9ed84a38f2650d517ec094387 Gerrit-Change-Number: 75170 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 13 May 2023 16:39:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: meson_options.txt: Unquote true
by Thomas Heijligen (Code Review) 13 May '23

13 May '23

Attention is currently required from: Angel Pons. Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/75149 ) Change subject: meson_options.txt: Unquote true ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/flashrom/+/75149/comment/4f0144c8_d4dc8fb7 PS1, Line 7: meson_options.txt: Unquote false > Done Thanks, I've looked to much in the documentation and lost track of the code. -- To view, visit https://review.coreboot.org/c/flashrom/+/75149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib3a46112678098ff3b2e92c44cf4539089216106 Gerrit-Change-Number: 75149 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sat, 13 May 2023 16:39:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in flashrom[master]: doc: Add Windows MSYS2 build instructions
by Thomas Heijligen (Code Review) 13 May '23

13 May '23

Attention is currently required from: Anastasia Klimchuk. Hello Anastasia Klimchuk, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/75189 to look at the new patch set (#2). Change subject: doc: Add Windows MSYS2 build instructions ...................................................................... doc: Add Windows MSYS2 build instructions Change-Id: I847428535547242ff32af92c4fe8477241826814 Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M doc/dev_guide/building_from_source.rst 1 file changed, 21 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/89/75189/2 -- To view, visit https://review.coreboot.org/c/flashrom/+/75189 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I847428535547242ff32af92c4fe8477241826814 Gerrit-Change-Number: 75189 Gerrit-PatchSet: 2 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: newpatchset

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