April 2022 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: flashrom.8.tmpl: Add raiden_debug_spi doc entry
by Nico Huber (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Felix Singer, Martin Roth, Edward O'Callaghan, Angel Pons, Nikolai Artemiev. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62768 ) Change subject: flashrom.8.tmpl: Add raiden_debug_spi doc entry ...................................................................... Patch Set 4: (2 comments) Patchset: PS4: > Nico, please refrain from condescending comments on code review. […] Edward, please refrain from treating every criticism as condescending. And how is this not actionable? You seem to document what you think the driver should do instead of looking into what it does. A reviewer needs to check the latter. You have all means to make the review easier, please do so. About your constant request for actionable items only: Where did you learn that? That's not how we review in this project, AFAICT. Reviewers used to be treated with respect here. If you request from reviewers to tell you exactly what to do, you kind of make them kindergarten teachers. File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/62768/comment/511721ea_74adbb3e PS3, Line 1166: false > Like I said, false is implicit. […] Sorry, misread that part in the new version. It still looks to me like `custom_rst=false` would be valid to pass even though it's the default. `<true>` doesn't work, btw., it's just `true`. -- To view, visit https://review.coreboot.org/c/flashrom/+/62768 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I186920006bdfcc7a9f89542f84b452dfc72b18e4 Gerrit-Change-Number: 62768 Gerrit-PatchSet: 4 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Tue, 12 Apr 2022 13:21:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: platform.h: remove const from forward declarations
by Thomas Heijligen (Code Review) 12 Apr '22

12 Apr '22

Thomas Heijligen has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/63585 ) Change subject: platform.h: remove const from forward declarations ...................................................................... platform.h: remove const from forward declarations Change-Id: Iea26d75719ebb718203dbba883ac88f459c68c0a Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> --- M platform.h 1 file changed, 16 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/85/63585/1 diff --git a/platform.h b/platform.h index adb2e73..4f2a4c1 100644 --- a/platform.h +++ b/platform.h @@ -77,27 +77,27 @@ uint##bits##_t name##bits (const uint##bits##_t value) { return swap##bits (value); } /* convert cpu native endian to little endian */ -uint8_t cpu_to_le8 (const uint8_t value); -uint16_t cpu_to_le16(const uint16_t value); -uint32_t cpu_to_le32(const uint32_t value); -uint64_t cpu_to_le64(const uint64_t value); +uint8_t cpu_to_le8 (uint8_t value); +uint16_t cpu_to_le16(uint16_t value); +uint32_t cpu_to_le32(uint32_t value); +uint64_t cpu_to_le64(uint64_t value); /* convert cpu native endian to big endian */ -uint8_t cpu_to_be8 (const uint8_t value); -uint16_t cpu_to_be16(const uint16_t value); -uint32_t cpu_to_be32(const uint32_t value); -uint64_t cpu_to_be64(const uint64_t value); +uint8_t cpu_to_be8 (uint8_t value); +uint16_t cpu_to_be16(uint16_t value); +uint32_t cpu_to_be32(uint32_t value); +uint64_t cpu_to_be64(uint64_t value); /* convert little endian to cpu native endian */ -uint8_t le_to_cpu8 (const uint8_t value); -uint16_t le_to_cpu16(const uint16_t value); -uint32_t le_to_cpu32(const uint32_t value); -uint64_t le_to_cpu64(const uint64_t value); +uint8_t le_to_cpu8 (uint8_t value); +uint16_t le_to_cpu16(uint16_t value); +uint32_t le_to_cpu32(uint32_t value); +uint64_t le_to_cpu64(uint64_t value); /* convert big endian to cpu native endian */ -uint8_t be_to_cpu8 (const uint8_t value); -uint16_t be_to_cpu16(const uint16_t value); -uint32_t be_to_cpu32(const uint32_t value); -uint64_t be_to_cpu64(const uint64_t value); +uint8_t be_to_cpu8 (uint8_t value); +uint16_t be_to_cpu16(uint16_t value); +uint32_t be_to_cpu32(uint32_t value); +uint64_t be_to_cpu64(uint64_t value); #endif /* !__PLATFORM_H__ */ -- To view, visit https://review.coreboot.org/c/flashrom/+/63585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iea26d75719ebb718203dbba883ac88f459c68c0a Gerrit-Change-Number: 63585 Gerrit-PatchSet: 1 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: newchange

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Change in flashrom[master]: ich_descriptors.c: Initialize structures
by Edward O'Callaghan (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Felix Singer, Nico Huber, Angel Pons, Light, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62763 ) Change subject: ich_descriptors.c: Initialize structures ...................................................................... Patch Set 11: Code-Review+2 (1 comment) File ich_descriptors.c: https://review.coreboot.org/c/flashrom/+/62763/comment/6134400e_671ad002 PS7, Line 1364: int ret = read_ich_descriptors_from_dump(dump, len, &cs, &desc); > So what is to be done here... I am inclined to go with this fix. -- To view, visit https://review.coreboot.org/c/flashrom/+/62763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6e5bc84c6199a0731db0a9c8ef56f1215686dab2 Gerrit-Change-Number: 62763 Gerrit-PatchSet: 11 Gerrit-Owner: Light <aarya.chaumal(a)gmail.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Light <aarya.chaumal(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Tue, 12 Apr 2022 12:32:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Comment-In-Reply-To: Light <aarya.chaumal(a)gmail.com> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: ichspi: Add support for Ice Lake
by Subrata Banik (Code Review) 12 Apr '22

12 Apr '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/63584 ) Change subject: ichspi: Add support for Ice Lake ...................................................................... ichspi: Add support for Ice Lake This patch adds Ice Lake support into flashrom. Additionally, utilize MSL (MCH Strap Length) to uniquely detect the chipset when the ICCRIBA (ICC Reg. Init Base Addr) field default value (0x34) on Ice Lake is the same as Cannon Lake. BUG=b:227115361 TEST=Flashrom is able to detect ICL SPI DID and show chipset name as below: > flashrom --flash-name .... Found chipset "Intel Ice Lake" ..... > flashrom - internal --ifd -i fd -i bios -r /tmp/bios.rom .... Reading ich_descriptor...done. Assuming chipset '400 series Ice Point'. Using regions: "bios", "fd". Reading flash... done. SUCCESS Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: If000b152c6e454617a7ad0245d16f8b1dea97fa0 --- M chipset_enable.c M ich_descriptors.c M ichspi.c M programmer.h M util/ich_descriptors_tool/ich_descriptors_tool.c 5 files changed, 41 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/84/63584/1 diff --git a/chipset_enable.c b/chipset_enable.c index b050f64..0ab97b2 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -604,6 +604,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -708,6 +709,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: boot_straps = boot_straps_pch8_lp; break; case CHIPSET_500_SERIES_TIGER_POINT: @@ -744,6 +746,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -992,7 +995,10 @@ static int enable_flash_pch400(struct pci_dev *const dev, const char *const name) { - return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT); + if (strcmp(name, "Ice Lake") == 0) + return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_400_SERIES_ICE_POINT); + else + return enable_flash_pch100_or_c620(dev, name, 0x1f, 5, CHIPSET_400_SERIES_COMET_POINT); } static int enable_flash_pch500(struct pci_dev *const dev, const char *const name) @@ -2140,7 +2146,7 @@ {0x8086, 0xa30c, B_S, NT, "Intel", "QM370", enable_flash_pch300}, {0x8086, 0xa30d, B_S, NT, "Intel", "HM370", enable_flash_pch300}, {0x8086, 0xa30e, B_S, DEP, "Intel", "CM246", enable_flash_pch300}, - {0x8086, 0x3482, B_S, DEP, "Intel", "Ice Lake U Premium", enable_flash_pch300}, + {0x8086, 0x34a4, B_S, DEP, "Intel", "Ice Lake", enable_flash_pch400}, {0x8086, 0x0684, B_S, NT, "Intel", "H470", enable_flash_pch400}, {0x8086, 0x0685, B_S, NT, "Intel", "Z490", enable_flash_pch400}, {0x8086, 0x0687, B_S, NT, "Intel", "Q470", enable_flash_pch400}, diff --git a/ich_descriptors.c b/ich_descriptors.c index 4d85e08..640de57 100644 --- a/ich_descriptors.c +++ b/ich_descriptors.c @@ -45,6 +45,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -114,7 +115,7 @@ "5 series Ibex Peak", "6 series Cougar Point", "7 series Panther Point", "8 series Lynx Point", "Baytrail", "8 series Lynx Point LP", "8 series Wellsburg", "9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point", - "C620 series Lewisburg", "300 series Cannon Point", "400 series Comet Point", + "C620 series Lewisburg", "300 series Cannon Point", "400 series Comet Point", "400 series Ice Point", "500 series Tiger Point", "600 series Alder Point", "Meteor Lake", "Apollo Lake", "Gemini Lake", "Elkhart Lake", }; if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names)) @@ -209,6 +210,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -301,6 +303,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: return freq_str[1][value]; case CHIPSET_APOLLO_LAKE: case CHIPSET_GEMINI_LAKE: @@ -333,6 +336,7 @@ switch (cs) { case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: msg_pdbg2("eSPI/EC Bus Clock Frequency: %s\n", freq_str[0][value]); return; case CHIPSET_500_SERIES_TIGER_POINT: @@ -353,6 +357,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -480,6 +485,7 @@ if (cs == CHIPSET_100_SERIES_SUNRISE_POINT || cs == CHIPSET_300_SERIES_CANNON_POINT || cs == CHIPSET_400_SERIES_COMET_POINT || + cs == CHIPSET_400_SERIES_ICE_POINT || cs == CHIPSET_500_SERIES_TIGER_POINT || cs == CHIPSET_600_SERIES_ALDER_POINT || cs == CHIPSET_METEOR_LAKE) { @@ -1040,8 +1046,12 @@ warn_peculiar_desc("100 series"); return CHIPSET_100_SERIES_SUNRISE_POINT; } else { - if (content->ICCRIBA == 0x34) - return CHIPSET_300_SERIES_CANNON_POINT; + if (content->ICCRIBA == 0x34) { + if (content->MSL == 0x03) + return CHIPSET_400_SERIES_ICE_POINT; + else + return CHIPSET_300_SERIES_CANNON_POINT; + } if (content->CSSL == 0x11) return CHIPSET_500_SERIES_TIGER_POINT; if (content->CSSL == 0x14) @@ -1072,6 +1082,7 @@ switch (guess) { case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -1230,6 +1241,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -1271,6 +1283,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: diff --git a/ichspi.c b/ichspi.c index a377247..7a0c6fd 100644 --- a/ichspi.c +++ b/ichspi.c @@ -426,6 +426,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_ELKHART_LAKE: break; @@ -439,6 +440,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_ELKHART_LAKE: pprint_reg(HSFS, PRR34_LOCKDN, reg_val, ", "); @@ -461,6 +463,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_ELKHART_LAKE: _pprint_reg(HSFC, PCH100_HSFC_FCYCLE, PCH100_HSFC_FCYCLE_OFF, reg_val, ", "); @@ -1797,6 +1800,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -1835,6 +1839,7 @@ break; case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -1895,6 +1900,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -1974,6 +1980,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -2012,6 +2019,7 @@ case CHIPSET_C620_SERIES_LEWISBURG: case CHIPSET_300_SERIES_CANNON_POINT: case CHIPSET_400_SERIES_COMET_POINT: + case CHIPSET_400_SERIES_ICE_POINT: case CHIPSET_500_SERIES_TIGER_POINT: case CHIPSET_600_SERIES_ALDER_POINT: case CHIPSET_METEOR_LAKE: @@ -2049,6 +2057,7 @@ (ich_gen == CHIPSET_100_SERIES_SUNRISE_POINT || ich_gen == CHIPSET_300_SERIES_CANNON_POINT || ich_gen == CHIPSET_400_SERIES_COMET_POINT || + ich_gen == CHIPSET_400_SERIES_ICE_POINT || ich_gen == CHIPSET_500_SERIES_TIGER_POINT || ich_gen == CHIPSET_600_SERIES_ALDER_POINT)) { msg_pdbg("Enabling hardware sequencing by default for 100+ series PCH.\n"); diff --git a/programmer.h b/programmer.h index 47d2dc3..78d7d59 100644 --- a/programmer.h +++ b/programmer.h @@ -350,6 +350,7 @@ CHIPSET_C620_SERIES_LEWISBURG, CHIPSET_300_SERIES_CANNON_POINT, CHIPSET_400_SERIES_COMET_POINT, + CHIPSET_400_SERIES_ICE_POINT, CHIPSET_500_SERIES_TIGER_POINT, CHIPSET_600_SERIES_ALDER_POINT, CHIPSET_METEOR_LAKE, diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c index 13a1897..e844ae4 100644 --- a/util/ich_descriptors_tool/ich_descriptors_tool.c +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -137,6 +137,7 @@ "\t- \"100\" or \"sunrise\" for Intel's 100 series chipsets.\n" "\t- \"300\" or \"cannon\" for Intel's 300 series chipsets.\n" "\t- \"400\" or \"comet\" for Intel's 400 series chipsets.\n" +"\t- \"400\" or \"ice\" for Intel's 400 series chipsets.\n" "\t- \"500\" or \"tiger\" for Intel's 500 series chipsets.\n" "\t- \"600\" or \"alder\" for Intel's 600 series chipsets.\n" "If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n" @@ -230,9 +231,12 @@ else if ((strcmp(csn, "300") == 0) || (strcmp(csn, "cannon") == 0)) cs = CHIPSET_300_SERIES_CANNON_POINT; - else if ((strcmp(csn, "400") == 0) || - (strcmp(csn, "comet") == 0)) - cs = CHIPSET_400_SERIES_COMET_POINT; + else if (strcmp(csn, "400") == 0) { + if (strcmp(csn, "comet") == 0) + cs = CHIPSET_400_SERIES_COMET_POINT; + else if (strcmp(csn, "ice") == 0) + cs = CHIPSET_400_SERIES_ICE_POINT; + } else if ((strcmp(csn, "500") == 0) || (strcmp(csn, "tiger") == 0)) cs = CHIPSET_500_SERIES_TIGER_POINT; -- To view, visit https://review.coreboot.org/c/flashrom/+/63584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If000b152c6e454617a7ad0245d16f8b1dea97fa0 Gerrit-Change-Number: 63584 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: sb600spi.c: Add Promontory chipset rev 0x71
by Edward O'Callaghan (Code Review) 12 Apr '22

12 Apr '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/63423 ) Change subject: sb600spi.c: Add Promontory chipset rev 0x71 ...................................................................... sb600spi.c: Add Promontory chipset rev 0x71 Sabrina SoC uses SMBUS revision code 0x71 which behaves exactly as the promontory chip. Hence add 0x71 as promontory. BUG=b:228238107 TEST=Build and deploy flashrom in Skyrim. Ensure that flashrom is able to detect the SPI ROM chip, read from it and write to it successfully. Ran flashrom_tester on Skyrim (Sabrina SoC) successfully and ensured that all the tests passed. Change-Id: I2408959fbf1c105508f0a12f38418c9606280ab9 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/63423 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M sb600spi.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Raul Rangel: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve Edward O'Callaghan: Looks good to me, approved diff --git a/sb600spi.c b/sb600spi.c index b1e140b..94c4d9b 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -130,9 +130,9 @@ * found on both Stoney Ridge and Zen platforms. * * The revisions I have found by searching various lspci - * outputs are as follows: 0x4b, 0x59 & 0x61. + * outputs are as follows: 0x4b, 0x59, 0x61 & 0x71. */ - } else if (rev == 0x4b || rev == 0x51 || rev == 0x59 || rev == 0x61) { + } else if (rev == 0x4b || rev == 0x51 || rev == 0x59 || rev == 0x61 || rev == 0x71) { msg_pdbg("Promontory (rev 0x%02x) detected.\n", rev); return CHIPSET_PROMONTORY; } else { -- To view, visit https://review.coreboot.org/c/flashrom/+/63423 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I2408959fbf1c105508f0a12f38418c9606280ab9 Gerrit-Change-Number: 63423 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in flashrom[master]: flashrom.8.tmpl: Add raiden_debug_spi doc entry
by Edward O'Callaghan (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Felix Singer, Nico Huber, Martin Roth, Angel Pons, Nikolai Artemiev. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62768 ) Change subject: flashrom.8.tmpl: Add raiden_debug_spi doc entry ...................................................................... Patch Set 4: (4 comments) Patchset: PS4: > Edward, it's nice that you want to document things. But please […] Nico, please refrain from condescending comments on code review. Stick to the point of actionable items. Especially when this patch is being done in response to your request. File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/62768/comment/1a7b951e_192c7c59 PS3, Line 1166: false > ``` […] Like I said, false is implicit. If you look at the revised patch you will see it is just `<true>` now. File flashrom.8.tmpl: https://review.coreboot.org/c/flashrom/+/62768/comment/33091644_3c318f80 PS4, Line 1141: must be specified > The code looks like it explicitly sends RAIDEN_DEBUG_SPI_REQ_ENABLE […] Seems to be in `get_target()` however I think the defaulting to `ec` is undocumented behavior. I would be inclined to say the function should be modified to return -1 if "target" is unspecified. Martin may know history here why it behaves like this? https://review.coreboot.org/c/flashrom/+/62768/comment/679be9e4_b6dfadf9 PS4, Line 1168: parameter changes the timeout value from 3ms to 10ms. > This is only applicable to `target=ap` AFAICS. maybe? -- To view, visit https://review.coreboot.org/c/flashrom/+/62768 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I186920006bdfcc7a9f89542f84b452dfc72b18e4 Gerrit-Change-Number: 62768 Gerrit-PatchSet: 4 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Comment-Date: Tue, 12 Apr 2022 12:21:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: Add -W options from Makefile into meson warning_flags
by Felix Singer (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Thomas Heijligen, Anastasia Klimchuk. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58561 ) Change subject: Add -W options from Makefile into meson warning_flags ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/flashrom/+/58561 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id401bfd642dc3c13d85bd9a2dba56ada38714c25 Gerrit-Change-Number: 58561 Gerrit-PatchSet: 3 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Tue, 12 Apr 2022 10:28:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: tests: Add and include headers with function prototypes
by Felix Singer (Code Review) 12 Apr '22

12 Apr '22

Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63489 ) Change subject: tests: Add and include headers with function prototypes ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/63489 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ia1ff22deb2354569f277649c6575ef2d5ffbb6e0 Gerrit-Change-Number: 63489 Gerrit-PatchSet: 2 Gerrit-Owner: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Tue, 12 Apr 2022 10:27:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: Endian conversion: move to platform.h and platform/endian*.c
by Nico Huber (Code Review) 12 Apr '22

12 Apr '22

Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/62899 ) Change subject: Endian conversion: move to platform.h and platform/endian*.c ...................................................................... Endian conversion: move to platform.h and platform/endian*.c Starting to move the platform dependent code to platform/ and provide the abstraction through the platform.h header. Change-Id: I35640282d451960f2a329ae24339ec05dbae6d30 Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62899 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile M hwaccess_physmap.c M meson.build R platform.h R platform/endian_big.c R platform/endian_little.c 6 files changed, 12 insertions(+), 11 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/Makefile b/Makefile index 0e6be20..f94f046 100644 --- a/Makefile +++ b/Makefile @@ -378,7 +378,7 @@ # Library code. LIB_OBJS = libflashrom.o layout.o flashrom.o udelay.o programmer.o programmer_table.o \ - helpers.o ich_descriptors.o fmap.o hwaccess_endian_$(ENDIAN).o + helpers.o ich_descriptors.o fmap.o platform/endian_$(ENDIAN).o ############################################################################### @@ -977,7 +977,8 @@ # This includes all frontends and libflashrom. # We don't use EXEC_SUFFIX here because we want to clean everything. clean: - rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a $(filter-out Makefile.d, $(wildcard *.d *.o)) $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) + rm -f $(PROGRAM) $(PROGRAM).exe libflashrom.a $(filter-out Makefile.d, $(wildcard *.d *.o platform/*.d platform/*.o)) \ + $(PROGRAM).8 $(PROGRAM).8.html $(BUILD_DETAILS_FILE) @+$(MAKE) -C util/ich_descriptors_tool/ clean install: $(PROGRAM)$(EXEC_SUFFIX) $(PROGRAM).8 diff --git a/hwaccess_physmap.c b/hwaccess_physmap.c index 7afe60d..2a2a243 100644 --- a/hwaccess_physmap.c +++ b/hwaccess_physmap.c @@ -24,7 +24,7 @@ #include <string.h> #include <errno.h> #include "flash.h" -#include "hwaccess.h" +#include "platform.h" #include "hwaccess_physmap.h" #if !defined(__DJGPP__) && !defined(__LIBPAYLOAD__) diff --git a/meson.build b/meson.build index 0643b5f..c84c5de 100644 --- a/meson.build +++ b/meson.build @@ -136,11 +136,11 @@ endif if host_machine.endian() == 'little' - srcs += 'hwaccess_endian_little.c' + srcs += 'platform/endian_little.c' add_project_arguments('-D__FLASHROM_LITTLE_ENDIAN__=1', language : 'c') endif if host_machine.endian() == 'big' - srcs += 'hwaccess_endian_big.c' + srcs += 'platform/endian_big.c' add_project_arguments('-D__FLASHROM_BIG_ENDIAN__=1', language : 'c') endif diff --git a/hwaccess.h b/platform.h similarity index 94% rename from hwaccess.h rename to platform.h index 72489f1..adb2e73 100644 --- a/hwaccess.h +++ b/platform.h @@ -16,11 +16,11 @@ */ /* - * Header file for hardware access and OS abstraction. Included from flash.h. + * Header file for platform abstraction. */ -#ifndef __HWACCESS_H__ -#define __HWACCESS_H__ 1 +#ifndef __PLATFORM_H__ +#define __PLATFORM_H__ 1 #include <stdint.h> @@ -100,4 +100,4 @@ uint32_t be_to_cpu32(const uint32_t value); uint64_t be_to_cpu64(const uint64_t value); -#endif /* !__HWACCESS_H__ */ +#endif /* !__PLATFORM_H__ */ diff --git a/hwaccess_endian_big.c b/platform/endian_big.c similarity index 97% rename from hwaccess_endian_big.c rename to platform/endian_big.c index 1f7b5a3..5d65500 100644 --- a/hwaccess_endian_big.c +++ b/platform/endian_big.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include "hwaccess.h" +#include "../platform.h" /* convert cpu native endian to little endian */ ___return_swapped(cpu_to_le, 8) diff --git a/hwaccess_endian_little.c b/platform/endian_little.c similarity index 97% rename from hwaccess_endian_little.c rename to platform/endian_little.c index c0b493f..b7c0068 100644 --- a/hwaccess_endian_little.c +++ b/platform/endian_little.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include "hwaccess.h" +#include "../platform.h" /* convert cpu native endian to little endian */ ___return_same(cpu_to_le, 8) 8 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/flashrom/+/62899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I35640282d451960f2a329ae24339ec05dbae6d30 Gerrit-Change-Number: 62899 Gerrit-PatchSet: 11 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Peter Marheine <pmarheine(a)chromium.org> Gerrit-MessageType: merged

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Change in flashrom[master]: hwaccess: replace macros by C code
by Nico Huber (Code Review) 12 Apr '22

12 Apr '22

Nico Huber has submitted this change. ( https://review.coreboot.org/c/flashrom/+/62898 ) Change subject: hwaccess: replace macros by C code ...................................................................... hwaccess: replace macros by C code Split the code for endian conversion into separate files for big and little endian. The buildsystem selects the correct file for the used endianness. Replace the swab macros with `static inline` c functions. Define macros for returning the same or swapped value. Call those macros in the endian specific files. Change-Id: I86d38d816b37c283279c485fac8027f8fb94364a Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/62898 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile M hwaccess.h A hwaccess_endian_big.c A hwaccess_endian_little.c M meson.build 5 files changed, 167 insertions(+), 69 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/Makefile b/Makefile index f5ed409..0e6be20 100644 --- a/Makefile +++ b/Makefile @@ -377,7 +377,9 @@ ############################################################################### # Library code. -LIB_OBJS = libflashrom.o layout.o flashrom.o udelay.o programmer.o programmer_table.o helpers.o ich_descriptors.o fmap.o +LIB_OBJS = libflashrom.o layout.o flashrom.o udelay.o programmer.o programmer_table.o \ + helpers.o ich_descriptors.o fmap.o hwaccess_endian_$(ENDIAN).o + ############################################################################### # Frontend related stuff. diff --git a/hwaccess.h b/hwaccess.h index 98ca08e..72489f1 100644 --- a/hwaccess.h +++ b/hwaccess.h @@ -2,6 +2,8 @@ * This file is part of the flashrom project. * * Copyright (C) 2009 Carl-Daniel Hailfinger + * Copyright (C) 2022 secunet Security Networks AG + * (written by Thomas Heijligen <thomas.heijligen(a)secunet.com) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -20,74 +22,82 @@ #ifndef __HWACCESS_H__ #define __HWACCESS_H__ 1 -#define ___constant_swab8(x) ((uint8_t) ( \ - (((uint8_t)(x) & (uint8_t)0xffU)))) +#include <stdint.h> -#define ___constant_swab16(x) ((uint16_t) ( \ - (((uint16_t)(x) & (uint16_t)0x00ffU) << 8) | \ - (((uint16_t)(x) & (uint16_t)0xff00U) >> 8))) - -#define ___constant_swab32(x) ((uint32_t) ( \ - (((uint32_t)(x) & (uint32_t)0x000000ffUL) << 24) | \ - (((uint32_t)(x) & (uint32_t)0x0000ff00UL) << 8) | \ - (((uint32_t)(x) & (uint32_t)0x00ff0000UL) >> 8) | \ - (((uint32_t)(x) & (uint32_t)0xff000000UL) >> 24))) - -#define ___constant_swab64(x) ((uint64_t) ( \ - (((uint64_t)(x) & (uint64_t)0x00000000000000ffULL) << 56) | \ - (((uint64_t)(x) & (uint64_t)0x000000000000ff00ULL) << 40) | \ - (((uint64_t)(x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \ - (((uint64_t)(x) & (uint64_t)0x00000000ff000000ULL) << 8) | \ - (((uint64_t)(x) & (uint64_t)0x000000ff00000000ULL) >> 8) | \ - (((uint64_t)(x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \ - (((uint64_t)(x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \ - (((uint64_t)(x) & (uint64_t)0xff00000000000000ULL) >> 56))) - -#if defined (__FLASHROM_BIG_ENDIAN__) - -#define cpu_to_le(bits) \ -static inline uint##bits##_t cpu_to_le##bits(uint##bits##_t val) \ -{ \ - return ___constant_swab##bits(val); \ +/* swap bytes */ +static inline uint8_t swap8(const uint8_t value) +{ + return (value & (uint8_t)0xffU); } -cpu_to_le(8) -cpu_to_le(16) -cpu_to_le(32) -cpu_to_le(64) - -#define cpu_to_be8 -#define cpu_to_be16 -#define cpu_to_be32 -#define cpu_to_be64 - -#elif defined (__FLASHROM_LITTLE_ENDIAN__) - -#define cpu_to_be(bits) \ -static inline uint##bits##_t cpu_to_be##bits(uint##bits##_t val) \ -{ \ - return ___constant_swab##bits(val); \ +static inline uint16_t swap16(const uint16_t value) +{ + return ((value & (uint16_t)0x00ffU) << 8) | + ((value & (uint16_t)0xff00U) >> 8); } -cpu_to_be(8) -cpu_to_be(16) -cpu_to_be(32) -cpu_to_be(64) +static inline uint32_t swap32(const uint32_t value) +{ + return ((value & (uint32_t)0x000000ffUL) << 24) | + ((value & (uint32_t)0x0000ff00UL) << 8) | + ((value & (uint32_t)0x00ff0000UL) >> 8) | + ((value & (uint32_t)0xff000000UL) >> 24); +} -#define cpu_to_le8 -#define cpu_to_le16 -#define cpu_to_le32 -#define cpu_to_le64 +static inline uint64_t swap64(const uint64_t value) +{ + return ((value & (uint64_t)0x00000000000000ffULL) << 56) | + ((value & (uint64_t)0x000000000000ff00ULL) << 40) | + ((value & (uint64_t)0x0000000000ff0000ULL) << 24) | + ((value & (uint64_t)0x00000000ff000000ULL) << 8) | + ((value & (uint64_t)0x000000ff00000000ULL) >> 8) | + ((value & (uint64_t)0x0000ff0000000000ULL) >> 24) | + ((value & (uint64_t)0x00ff000000000000ULL) >> 40) | + ((value & (uint64_t)0xff00000000000000ULL) >> 56); +} -#endif /* __FLASHROM_BIG_ENDIAN__ / __FLASHROM_LITTLE_ENDIAN__ */ +/* + * macro to return the same value as passed. + * + * `___return_same(cpu_to_le, 8)` + * expands to + * `uint8_t cpu_to_le8 (const uint8_t value) { return value; }` + */ +#define ___return_same(name, bits) \ + uint##bits##_t name##bits (const uint##bits##_t value) { return value; } -#define be_to_cpu8 cpu_to_be8 -#define be_to_cpu16 cpu_to_be16 -#define be_to_cpu32 cpu_to_be32 -#define be_to_cpu64 cpu_to_be64 -#define le_to_cpu8 cpu_to_le8 -#define le_to_cpu16 cpu_to_le16 -#define le_to_cpu32 cpu_to_le32 -#define le_to_cpu64 cpu_to_le64 +/* + * macro to return the swapped value as passed. + * + * `___return_swapped(cpu_to_be, 8)` + * expands to + * `uint8_t cpu_to_be8 (const uint8_t value) { return swap8 (value); }` + */ +#define ___return_swapped(name, bits) \ + uint##bits##_t name##bits (const uint##bits##_t value) { return swap##bits (value); } + +/* convert cpu native endian to little endian */ +uint8_t cpu_to_le8 (const uint8_t value); +uint16_t cpu_to_le16(const uint16_t value); +uint32_t cpu_to_le32(const uint32_t value); +uint64_t cpu_to_le64(const uint64_t value); + +/* convert cpu native endian to big endian */ +uint8_t cpu_to_be8 (const uint8_t value); +uint16_t cpu_to_be16(const uint16_t value); +uint32_t cpu_to_be32(const uint32_t value); +uint64_t cpu_to_be64(const uint64_t value); + +/* convert little endian to cpu native endian */ +uint8_t le_to_cpu8 (const uint8_t value); +uint16_t le_to_cpu16(const uint16_t value); +uint32_t le_to_cpu32(const uint32_t value); +uint64_t le_to_cpu64(const uint64_t value); + +/* convert big endian to cpu native endian */ +uint8_t be_to_cpu8 (const uint8_t value); +uint16_t be_to_cpu16(const uint16_t value); +uint32_t be_to_cpu32(const uint32_t value); +uint64_t be_to_cpu64(const uint64_t value); #endif /* !__HWACCESS_H__ */ diff --git a/hwaccess_endian_big.c b/hwaccess_endian_big.c new file mode 100644 index 0000000..1f7b5a3 --- /dev/null +++ b/hwaccess_endian_big.c @@ -0,0 +1,42 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2022 secunet Security Networks AG + * (written by Thomas Heijligen <thomas.heijligen(a)secunet.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "hwaccess.h" + +/* convert cpu native endian to little endian */ +___return_swapped(cpu_to_le, 8) +___return_swapped(cpu_to_le, 16) +___return_swapped(cpu_to_le, 32) +___return_swapped(cpu_to_le, 64) + +/* convert cpu native endian to big endian */ +___return_same(cpu_to_be, 8) +___return_same(cpu_to_be, 16) +___return_same(cpu_to_be, 32) +___return_same(cpu_to_be, 64) + +/* convert little endian to cpu native endian */ +___return_swapped(le_to_cpu, 8) +___return_swapped(le_to_cpu, 16) +___return_swapped(le_to_cpu, 32) +___return_swapped(le_to_cpu, 64) + +/* convert big endian to cpu native endian */ +___return_same(be_to_cpu, 8) +___return_same(be_to_cpu, 16) +___return_same(be_to_cpu, 32) +___return_same(be_to_cpu, 64) diff --git a/hwaccess_endian_little.c b/hwaccess_endian_little.c new file mode 100644 index 0000000..c0b493f --- /dev/null +++ b/hwaccess_endian_little.c @@ -0,0 +1,42 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2022 secunet Security Networks AG + * (written by Thomas Heijligen <thomas.heijligen(a)secunet.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include "hwaccess.h" + +/* convert cpu native endian to little endian */ +___return_same(cpu_to_le, 8) +___return_same(cpu_to_le, 16) +___return_same(cpu_to_le, 32) +___return_same(cpu_to_le, 64) + +/* convert cpu native endian to big endian */ +___return_swapped(cpu_to_be, 8) +___return_swapped(cpu_to_be, 16) +___return_swapped(cpu_to_be, 32) +___return_swapped(cpu_to_be, 64) + +/* convert little endian to cpu native endian */ +___return_same(le_to_cpu, 8) +___return_same(le_to_cpu, 16) +___return_same(le_to_cpu, 32) +___return_same(le_to_cpu, 64) + +/* convert big endian to cpu native endian */ +___return_swapped(be_to_cpu, 8) +___return_swapped(be_to_cpu, 16) +___return_swapped(be_to_cpu, 32) +___return_swapped(be_to_cpu, 64) diff --git a/meson.build b/meson.build index b7fc25f..0643b5f 100644 --- a/meson.build +++ b/meson.build @@ -29,13 +29,6 @@ add_project_arguments('-D_BSD_SOURCE', language : 'c') # required for glibc < v2.19 add_project_arguments('-DFLASHROM_VERSION="' + meson.project_version() + '"', language : 'c') -if host_machine.endian() == 'little' - add_project_arguments('-D__FLASHROM_LITTLE_ENDIAN__=1', language : 'c') -endif -if host_machine.endian() == 'big' - add_project_arguments('-D__FLASHROM_BIG_ENDIAN__=1', language : 'c') -endif - if host_machine.system() in ['cygwin', 'windows'] add_project_arguments('-DIS_WINDOWS=1', language : 'c') else @@ -142,6 +135,15 @@ add_project_arguments('-DHAVE_UTSNAME=1', language : 'c') endif +if host_machine.endian() == 'little' + srcs += 'hwaccess_endian_little.c' + add_project_arguments('-D__FLASHROM_LITTLE_ENDIAN__=1', language : 'c') +endif +if host_machine.endian() == 'big' + srcs += 'hwaccess_endian_big.c' + add_project_arguments('-D__FLASHROM_BIG_ENDIAN__=1', language : 'c') +endif + # some programmers require libusb if get_option('usb') srcs += 'usbdev.c' -- To view, visit https://review.coreboot.org/c/flashrom/+/62898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I86d38d816b37c283279c485fac8027f8fb94364a Gerrit-Change-Number: 62898 Gerrit-PatchSet: 11 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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flashrom-gerrit April 2022