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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58738 )
Change subject: cli_classic: add writeprotect CLI
......................................................................
Patch Set 77:
(6 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/58738/comment/80a3b817_b093abd0
PS77, Line 10:
You can add into commit message the patch is also updating manpage for new cli commands.
https://review.coreboot.org/c/flashrom/+/58738/comment/3e369d60_08a6a4dd
PS77, Line 14: --wp-{enable,disable,range,list,status}
There is also --wp-region command, you probably tested it too?
File cli_classic.c:
https://review.coreboot.org/c/flashrom/+/58738/comment/fd674d56_969c7934
PS77, Line 274: likley
Typo: likley -> likely
https://review.coreboot.org/c/flashrom/+/58738/comment/14c0b4ed_51080cc8
PS77, Line 493: uint32_t wp_start = 0, wp_len = 0;
Maybe move it above next to other wp variables?
Between #471 and #472 for example.
https://review.coreboot.org/c/flashrom/+/58738/comment/5bd64738_4ba7f776
PS77, Line 770: case OPTION_WP_SET_REGION:
Is there a reason why OPTION_WP_SET_REGION comes last in the switch, and not next to all other WP options?
https://review.coreboot.org/c/flashrom/+/58738/comment/4669960f_18c8a54f
PS77, Line 985: disable_wp
Just to double-check: can disable_wp run together with set_wp_range or set_wp_region?
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Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/63601 )
Change subject: raiden_debug_spi.c: Allow custom_rst param value of 'false'
......................................................................
raiden_debug_spi.c: Allow custom_rst param value of 'false'
As identified while documenting driver, allow for passing
'false' even though it is the default for custom_rst to be
consistent.
BUG=b:224358254
TEST=builds
Change-Id: I25bfe6f8e3f7cfffb1a9c99ac90ec56a750d7f84
Signed-off-by: Edward O'Callaghan <quasisec(a)google.com>
---
M raiden_debug_spi.c
1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/01/63601/1
diff --git a/raiden_debug_spi.c b/raiden_debug_spi.c
index 3f35552..e37c313 100644
--- a/raiden_debug_spi.c
+++ b/raiden_debug_spi.c
@@ -1414,6 +1414,8 @@
if (custom_rst_str) {
if (!strcasecmp(custom_rst_str, "true"))
ap_request = RAIDEN_DEBUG_SPI_REQ_ENABLE_AP_CUSTOM;
+ else if (!strcasecmp(custom_rst_str, "false"))
+ ap_request = RAIDEN_DEBUG_SPI_REQ_ENABLE_AP;
else {
msg_perr("Invalid custom rst param: %s\n",
custom_rst_str);
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63584 )
Change subject: ichspi: Add support for Ice Lake
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63584/comment/24f32b8d_06d1de4e
PS1, Line 7: ichspi: Add support for Ice Lake
> > Technically, it's already supported. Why do we need to do more than […]
As discussed during review of the first of these patches, adding all
the clutter that a new enum entry brings with it is wrong and should
be fixed. They were only merged because Edwards said he could look
into it later. Most of what these patches do needs to be undone even-
tually.
I assume this work (to check that the existing 300-series code behaves
the same) was already done for Ice Lake. Just without the noise people
make in other patches.
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/63584/comment/88b9d8dc_2c2850b1
PS1, Line 2149: 0x34a4
> > Is the SPI device guaranteed not to be hidden on Ice Lake? […]
But can it be hidden? Maybe not everybody have updated their code
to comply with the changed FAS.
The safest way, IMO, would be to add the SPI controller ID and leave
the entry with the PCH ID as is. This way, it can't regress in case
there is a device with that ID and hidden SPI controller.
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63584 )
Change subject: ichspi: Add support for Ice Lake
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63584/comment/c150f82c_0f65d131
PS1, Line 7: ichspi: Add support for Ice Lake
> Technically, it's already supported. Why do we need to do more than
> changing the PCI ID?
Apart from adding PCH DID (instead of SPI DID), i don't see ICL support is added, compared to some recent work being done with CB:62783, CB:62282 and CB:62251 for other Intel chipsets.
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/63584/comment/436cc48c_aeb59c44
PS1, Line 2149: 0x34a4
> Is the SPI device guaranteed not to be hidden on Ice Lake?
yes, SPI controller is visible on ICL. FAS doesn't specifies any restriction of hiding the SPI controller.
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Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63585 )
Change subject: platform.h: remove const from forward declarations
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63585/comment/f6346e17_0fcef8a4
PS1, Line 8:
> Please add some reasoning, not every developer knows this, e.g. […]
Done
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Hello Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/63585
to look at the new patch set (#2).
Change subject: platform.h: remove const from forward declarations
......................................................................
platform.h: remove const from forward declarations
A `const` on the parameter itself is irrelevant to the caller.
Change-Id: Iea26d75719ebb718203dbba883ac88f459c68c0a
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M platform.h
1 file changed, 16 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/85/63585/2
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Change subject: ichspi: Add support for Ice Lake
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63584/comment/b0df2f89_e377a109
PS1, Line 7: ichspi: Add support for Ice Lake
Technically, it's already supported. Why do we need to do more than
changing the PCI ID?
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/63584/comment/af74a6aa_e86969fc
PS1, Line 2149: 0x34a4
Is the SPI device guaranteed not to be hidden on Ice Lake?
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63585 )
Change subject: platform.h: remove const from forward declarations
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63585/comment/d892c130_509c107d
PS1, Line 8:
Please add some reasoning, not every developer knows this, e.g.
A `const` on the parameter itself is irrelevant to the caller.
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