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foss(a)volatilesystems.org has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69309 )
Change subject: flashchips: Add support for XMC XM25QH128A.
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> You haven't uploaded a new patchset where the comments are resolved. […]
Thought it might have been better to wait for clarity on the commit message before doing that, but I just pushed a revised patch.
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Hello Felix Singer, build bot (Jenkins), Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69309
to look at the new patch set (#2).
Change subject: flashchips: Add support for XMC XM25QH128A.
......................................................................
flashchips: Add support for XMC XM25QH128A.
Tested: read, write and erase.
Chip (and datasheet) have recenty been removed from XMC's website
but can still be retrieved through Google cache:
https://webcache.googleusercontent.com/search?q=cache:u5f9AHWyvFEJ:https://…
Signed-off-by: Stijn Segers <foss(a)volatilesystems.org>
Change-Id: Iced40403c6694a55fd648ea2785cdcba21712234
---
M flashchips.c
M include/flashchips.h
2 files changed, 65 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/09/69309/2
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69765 )
Change subject: flashrom_tester: Fix unit test error
......................................................................
Patch Set 2: Code-Review+2
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Hello build bot (Jenkins), Edward O'Callaghan, Angel Pons, Peter Marheine,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69765
to look at the new patch set (#2).
Change subject: flashrom_tester: Fix unit test error
......................................................................
flashrom_tester: Fix unit test error
Commit 065366d (flashrom_tester: Change timestamp to UTC microsecond)
changed the time format, breaking the unit test. This patch
fixes the unit test.
BUG=None
BRANCH=None
TEST=cargo test
Change-Id: Iba42a9026b41ddb61bb704aa1c26783cd251d787
Signed-off-by: Evan Benn <evanbenn(a)chromium.org>
---
M util/flashrom_tester/src/logger.rs
1 file changed, 21 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/65/69765/2
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Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69846 )
Change subject: writeprotect.c: Split register value/mask calculation into pure func
......................................................................
Patch Set 3:
(4 comments)
This change is ready for review.
Commit Message:
https://review.coreboot.org/c/flashrom/+/69846/comment/4187c6ac_a15a8765
PS1, Line 7: move wp_bits -> register values/masks conversion into func
> "Split out reg mask/val calculations into pure func"
Done
https://review.coreboot.org/c/flashrom/+/69846/comment/86a30c50_8428abb1
PS1, Line 11: .
> "This avoids monadic transformer stacks where unit-testing cannot penetrate well to give suitable co […]
Done
https://review.coreboot.org/c/flashrom/+/69846/comment/18dd03f2_626ffc93
PS1, Line 13: TEST=ninja test
> `BUG=b:259013033`
Done
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/69846/comment/ed022bd1_03fd3bb5
PS1, Line 170: bit_masks, write_masks
> Swapped arguments. […]
Done
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69842 )
Change subject: opaque_master: Mark Opaque chip as tested for WP
......................................................................
Patch Set 2:
(6 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/69842/comment/f5a17bac_ca272fe1
PS1, Line 9: Opaque masters by design are populating information about a flashchip
: on the runtime inside their probe function.
> I had a hard time parsing this. I think you mean to say: […]
Done
https://review.coreboot.org/c/flashrom/+/69842/comment/944d9cbe_753bbdf8
PS1, Line 10: For the user the chip
: is visible as "Opaque flash chip".
> delete.
Done
https://review.coreboot.org/c/flashrom/+/69842/comment/b2192945_42320933
PS1, Line 11: Without this patch, any operation
: on opaque flash chip
> "Therefore any opaque master operation"
Done
https://review.coreboot.org/c/flashrom/+/69842/comment/c2b03abe_ebf71f14
PS1, Line 13: and advises
: to report on the mailing list. However, this is not very useful in
: the case of Opaque chip.
:
> delete and stop sentence here ". […]
Done
https://review.coreboot.org/c/flashrom/+/69842/comment/1c3c9964_7065f9fd
PS1, Line 17: For
> "However, for"
Done
https://review.coreboot.org/c/flashrom/+/69842/comment/21998f6f_033661ec
PS1, Line 18: So it seems in line with opaque design
: to mark WP as tested too.
> "Thus, align WP as marked tested inline with other opaque chip operations. […]
Done
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Hello Felix Singer, build bot (Jenkins), Edward O'Callaghan, Angel Pons, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/69842
to look at the new patch set (#2).
Change subject: opaque_master: Mark Opaque chip as tested for WP
......................................................................
opaque_master: Mark Opaque chip as tested for WP
Opaque masters, by design, populate the flashchip structure during
the execution of their probe function. Therefore any opaque master
operation displays a message to the user:
"This flash part has status UNTESTED for operations: WP".
However, for all the other operations (read, write, erase) opaque
masters always mark them as tested. Thus, align WP as marked tested
inline with other opaque chip operations.
BUG=b:258755442
TEST=the following does not display untested message:
1) flashrom -p dummy:size=8388608,emulate=VARIABLE_SIZE
2) flashrom -p internal (on Intel device)
Change-Id: I5ae4cb49eb0abc6ab26cfe2f3359e4e50dd4fd4f
Signed-off-by: Anastasia Klimchuk <aklm(a)chromium.org>
---
M dummyflasher.c
M ichspi.c
M nicintel_eeprom.c
3 files changed, 28 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/42/69842/2
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69309 )
Change subject: Add support for XMC XM25QH128A. Read/write tested.
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
You haven't uploaded a new patchset where the comments are resolved. So at the moment we all see old code which does not build. I understand you have fixed that locally, now you need to upload to Gerrit. You do it the same way as pushing the patch, but pay attention that Change-Id stays the same. Change-Id is an indication for Gerrit to link new patchset to the same patch.
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/69842 )
Change subject: opaque_master: Mark Opaque chip as tested for WP
......................................................................
Patch Set 1:
(6 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/69842/comment/a5e426e2_130b303d
PS1, Line 9: Opaque masters by design are populating information about a flashchip
: on the runtime inside their probe function.
I had a hard time parsing this. I think you mean to say:
"Opaque masters, by design, populate the flashchip structure during the execution of their probe function."
https://review.coreboot.org/c/flashrom/+/69842/comment/878e82cb_59b47233
PS1, Line 10: For the user the chip
: is visible as "Opaque flash chip".
delete.
https://review.coreboot.org/c/flashrom/+/69842/comment/1f30af4e_da8b3f3c
PS1, Line 11: Without this patch, any operation
: on opaque flash chip
"Therefore any opaque master operation"
https://review.coreboot.org/c/flashrom/+/69842/comment/fca0c355_1d27e618
PS1, Line 13: and advises
: to report on the mailing list. However, this is not very useful in
: the case of Opaque chip.
:
delete and stop sentence here "."
https://review.coreboot.org/c/flashrom/+/69842/comment/634caffe_a53fd797
PS1, Line 17: For
"However, for"
https://review.coreboot.org/c/flashrom/+/69842/comment/ac94eff6_5511756f
PS1, Line 18: So it seems in line with opaque design
: to mark WP as tested too.
"Thus, align WP as marked tested inline with other opaque chip operations."
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