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Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58475 )
Change subject: spi25_statusreg: make register read/write functions generic
......................................................................
Patch Set 20:
(3 comments)
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58475/comment/2865d255_4035f2c4
PS15, Line 63: */
> Well, it's one thing to avoid a kludge for new use cases but something […]
Done
https://review.coreboot.org/c/flashrom/+/58475/comment/c6ddbaa8_895cba2f
PS15, Line 84: *
> Doesn't look done. […]
Done - for real this time, sorry about that ;)
https://review.coreboot.org/c/flashrom/+/58475/comment/f80b2dae_5b7b500e
PS15, Line 89: }
> Are you saying one can't use an if inside switch/case? I've looked […]
Really it was just that a switch with nested ifs creates multiple places that errors have to be handled, but that does make it easier to have specific error messages so I can see the benefit.
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59528
to look at the new patch set (#24).
Change subject: spi25_statusreg: inline spi_write_register_flag()
......................................................................
spi25_statusreg: inline spi_write_register_flag()
Creating the entire SPI command that should be sent to the chip in
spi_write_register() is simpler than splitting it across two functions
that have to pass multiple parameters between them.
Additionally, having separate spi_write_register_flag() function
provided little benefit, as it was only ever called from
spi_write_register().
BUG=b:195381327,b:153800563
TEST=builds
BRANCH=none
Change-Id: I4996b0848d0ed09032bad2ab13ab1f40bbfc0304
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M spi25_statusreg.c
1 file changed, 55 insertions(+), 70 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/28/59528/24
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I'd like you to reexamine a change. Please visit
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Change subject: spi25_statusreg: delete read_status_register()
......................................................................
spi25_statusreg: delete read_status_register()
BUG=b:195381327,b:153800563
TEST=builds
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Change-Id: I146b4b5439872e66c5d33e156451a729d248c7da
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---
M chipdrivers.h
M it87spi.c
M s25f.c
M spi25.c
M spi25_statusreg.c
5 files changed, 143 insertions(+), 47 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/29/59529/24
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I'd like you to reexamine a change. Please visit
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Change subject: spi25_statusreg: inline spi_write_register_flag()
......................................................................
spi25_statusreg: inline spi_write_register_flag()
Creating the entire SPI command that should be sent to the chip in
spi_write_register() is simpler than splitting it across two functions
that have to pass multiple parameters between them.
Additionally, having separate spi_write_register_flag() function
provided little benefit, as it was only ever called from
spi_write_register().
BUG=b:195381327,b:153800563
TEST=builds
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Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M spi25_statusreg.c
1 file changed, 55 insertions(+), 70 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/28/59528/23
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I'd like you to reexamine a change. Please visit
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Change subject: libflashrom,writeprotect: add functions for reading/writing WP settings
......................................................................
libflashrom,writeprotect: add functions for reading/writing WP settings
Two new functions are exposed through the libflashrom API:
`flashrom_wp_{read,write}_settings()`. The input/output of these
functions is a `struct flashrom wp_settings` instance, which includes
the flash protection range and status register protection mode.
This commit also adds `{read,write}_wp_bits()` helper functions that
read/write chip-specific WP configuration bits.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I3ad25708c3321b8fb0216c3eaf6ffc07616537ad
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M libflashrom.h
M writeprotect.c
2 files changed, 228 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/79/58479/28
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I'd like you to reexamine a change. Please visit
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Change subject: writeprotect.h: add structure to represent chip wp configuration bits
......................................................................
writeprotect.h: add structure to represent chip wp configuration bits
Add `struct wp_bits` for representing values of all WP bits in a chip's
status/config register(s).
It allows most WP code to store and manipulate a chip's configuration
without knowing the exact layout of bits in the chip's status registers.
Supporting other chips may require additional fields to be added to the
structure.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
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---
M flash.h
M writeprotect.h
2 files changed, 32 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/58478/27
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Change subject: flashchips: add writeprotect bit layout map to chips
......................................................................
flashchips: add writeprotect bit layout map to chips
This patch adds a register bit map `struct reg_bit_info`, with fields
for storing the register, bit index, and writability of each bit that
affects the chip's write protection. This allows writeprotect code to be
independent of the register layout of any specific chip. The new fields
have been filled out for example chips.
The representation is centered around describing how bits can be
accessed and modified, rather than the layout of registers. This is
generally easier to work with in code that needs to access specific bits
and typically requires specifying the locations of fewer bits overall.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: Id08d77e6d4ca5109c0d698271146d026dbc21284
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M writeprotect.h
3 files changed, 56 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/77/58477/26
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to look at the new patch set (#23).
Change subject: spi25_statusreg,flashchips: add SR2 read/write support
......................................................................
spi25_statusreg,flashchips: add SR2 read/write support
This patch adds support for reading and writing the second status
register and enables it on a limited set of flash chips.
Chip support for RDSR2/WRSR2/extended WRSR is represented using feature
flags to be consistent with how other SPI capabilities are represented.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
TEST=logged SR2 read/write values during wp commands
BRANCH=none
Change-Id: I34a503b0958e8f2f22a2a993a6ea529eb46b41db
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M flash.h
M flashchips.c
M spi.h
M spi25_statusreg.c
4 files changed, 53 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/70/58570/23
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#20).
Change subject: spi25_statusreg: make register read/write functions generic
......................................................................
spi25_statusreg: make register read/write functions generic
This patch adds new spi_{read,write}_register() functions that take the
source/destination register as an argument. Currently they can only
access SR1, support for other registers will be added in another patch.
Since we're refactoring things, this commit also makes
spi_read_register() return an error code, making it possible to identify
error conditions that spi_read_status_register() concealed.
This also removes the initial 100ms delay between writing a register and
the first attempt to check the chip's status. An initial delay was added
to avoid needing to read the status register multiple times, but that is
unlikely to cause problems on modern flash chips.
BUG=b:195381327,b:153800563
TEST=flashrom --wp-{enable,disable,range,list,status} at end of patch series
BRANCH=none
Change-Id: I0a3951bbf993f2d8d830143b29d3ce16cc6901d7
Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com>
---
M chipdrivers.h
M flash.h
M spi25_statusreg.c
3 files changed, 99 insertions(+), 43 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/58475/20
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59742 )
Change subject: tests: Upgrade linux_spi test to run probe lifecycle
......................................................................
Patch Set 2: Code-Review-1
(1 comment)
File tests/lifecycle.c:
https://review.coreboot.org/c/flashrom/+/59742/comment/4b981685_a58be6f4
PS2, Line 336: W25Q128.V
> So, this should be expected to fail, but happens to work because the chip […]
Thank you so much for finding the problem! I missed the elephant in the room, forgot about caching IDs :( I mark this as -1 to fix the problem. I believe probing in tests is a good idea, so I will continue working.
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Gerrit-Comment-Date: Mon, 17 Jan 2022 06:16:21 +0000
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