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Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
Patch Set 26:
(1 comment)
File bitbang_spi.c:
https://review.coreboot.org/c/flashrom/+/49255/comment/93f32fe3_53aa1fb6
PS26, Line 121: programmer_delay(master->half_period);
: bitbang_spi_set_sck_set_mosi(master, !cpol, (val >> i) & 1);
: programmer_delay(master->half_period);
: bitbang_spi_set_sck(master, cpol);
This does not look right and is probably what led to the follow up commit.
With cpha=0, the receiver is supposed to sample the data at the first edge.
So the sequence should be:
* set mosi
* delay
* first edge
* delay
* second edge
* (followed without delay by the next mosi setting)
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/49255 )
Change subject: bitbang-spi.c: support clock polarity and phase
......................................................................
Patch Set 26:
(8 comments)
Commit Message:
https://review.coreboot.org/c/flashrom/+/49255/comment/fba2547c_d605eaa9
PS1, Line 8:
> Sorry I misunderstood.
The change does two things: 1. implements a better mode 0, 2. adds the
option of other modes. The former is most welcome. I also like to get the
whole patch merged, under one condition: The commit message has to give a
reasonable incentive to add the optional modes.
For instance, what chip needs it to be supported? and what other changes
are in the queue to make flashrom support it? Currently all the common code
assumes that the programmer either implements mode 0 or 3 and that all flash
chips support both. If we need to support other chips, the common code would
have to change too, right?
Commit Message:
https://review.coreboot.org/c/flashrom/+/49255/comment/af59a92c_a15486b2
PS26, Line 11: may not be
This "may not be" is rather vague. Do we know a real-world use case?
Patchset:
PS26:
Sorry, I'm very late to this review. There is still the early question
about the reason for the change. Basically, do we have a real-world use
case?
File bitbang_spi.c:
https://review.coreboot.org/c/flashrom/+/49255/comment/147d1383_28ee3080
PS26, Line 171: _set_mosi
Removing the spurious MOSI settings seems fine, but it should be
mentioned in the commit message (or happen in a preceding commit).
https://review.coreboot.org/c/flashrom/+/49255/comment/cad0abf5_d7823283
PS26, Line 34: data transmission
Technically, it's the data sampling (or capturing, as Wikipedia puts it)
that happens, not the transmission.
https://review.coreboot.org/c/flashrom/+/49255/comment/b4c52ed0_ba3e8580
PS26, Line 96: bitbang_spi_set_sck(master, !cpol);
The first clock change always needs to happen with a delay after
asserting CS#. Both cpha cases should start with a delay.
https://review.coreboot.org/c/flashrom/+/49255/comment/c2ff835a_2f5e6f13
PS26, Line 184: if (strlen(mode)) {
So an empty string is not reported as error?
https://review.coreboot.org/c/flashrom/+/49255/comment/e5719916_50b36152
PS26, Line 187: mode == endptr
This does not account for trailing garbage. It's better to check for
the null termination, e.g.
if (*mode == '\0' || *endptr != '\0' || v > 3 || v < 0) {
(this includes checking for an empty string)
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52946 )
Change subject: programmer_table: move each entry to the associated programmer source
......................................................................
Patch Set 12:
(1 comment)
File programmer.h:
https://review.coreboot.org/c/flashrom/+/52946/comment/73431de3_961b68e3
PS4, Line 402: #if CONFIG_DUMMY == 1
> Please just drop all these `#if`. The only difference it makes is
> whether we get a compile-time or link-time error if something goes
> wrong. I don't think it matters or even justifies the clutter.
>
> Mentioning the file name is also a bit redundant. Maybe just a single
> comment /* programmer drivers */ ?
>
> Doesn't have to be in this patch, though
CB:55387
> Thank you so much! Your long message is very helpful, I think now I actually understand: extern declaration by itself is fine, as long as all the usages are guarded.
I made CB:55386 on coreboot earlier today. It introduces a helper function to transform a compile-time error into a link-time error, which allows dropping some preprocessor usage in code.
I just forced build errors by not enabling `DEBUG_BOOT_STATE` and manually inverting the condition in src/lib/hardwaremain.c in order to show you the difference between a compile-time error and a link-time error.
Compile-time error excerpt:
src/lib/hardwaremain.c: In function 'bs_call_callbacks':
src/lib/hardwaremain.c:279:15: error: 'struct boot_state_callback' has no member named 'location'
bscb, bscb->location);
The `location` member is inside a text block guarded by a conditional preprocessor directive. Since the `CONFIG(DEBUG_BOOT_STATE)` condition is false, the preprocessor does not pass the contents of this text block to the compiler, and the compiler does not "see" the `location` member in the struct definition. When it reaches the `bscb->location` part, the compiler complains about the non-existent `location` member.
Link-time error excerpt:
coreboot-builds/HP_280_G2/generated/ramstage.o: in function `bscb_location':
src/include/bootstate.h:114: undefined reference to `_dead_code_assertion_failed'
The `dead_code_t` macro inside the `bscb_location` function evaluates to some expression that calls the `_dead_code_assertion_failed` function, which is intentionally never defined (only declared). Compilation succeeds: the source code can be translated into a `hardwaremain.o` object file, which contains external definitions and references for linking. However, when the linker tries to resolve the external references, it cannot find a definition for the `_dead_code_assertion_failed` function, and bails out.
The advantage of link-time errors over compile-time errors (i.e. what CB:55386 leverages) is that the compiler can automatically optimise out the code that would cause a link-time error. CB:55386 works because `bscb_location` is never reached when the `CONFIG(DEBUG_BOOT_STATE)` condition is false, and the compiler can thus optimise `bscb_location` away along with the `_dead_code_assertion_failed` function call.
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Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/52877 )
Change subject: buspirate_spi.c: Separate shutdown from failed init cleanup
......................................................................
Patch Set 4: Code-Review+1
(1 comment)
File buspirate_spi.c:
https://review.coreboot.org/c/flashrom/+/52877/comment/3038fc96_58ceddfa
PS4, Line 620: ret = 1;
For another patch: We could get rid of these `ret = 1;` statements and just use the existing non-zero value.
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