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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58736 )
Change subject: ichspi: Extract handling programmer param into a function
......................................................................
Patch Set 1:
(1 comment)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58736/comment/15936bd9_1c68b331
PS1, Line 1761: if (arg && !strcmp(arg, "hwseq")) {
Just a thought: This would be more readable (and also look better) as a switch-case I think.
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Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58735 )
Change subject: ichspi: Split very long init function into two
......................................................................
Patch Set 1:
(1 comment)
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58735/comment/b5841fee_75b05064
PS1, Line 2049: else {
: register_spi_master(&spi_master_ich9, NULL);
: }
nit: Reverse the condition so that the simple case comes first
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59372 )
Change subject: flashrom.c: Validate before allocate in verify_range()
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> Sorry for delay, this is nice and useful patch! I should have looked long time ago, but I got buried […]
Positive path can be tested with the dummy programmer, e.g.
$ ./flashrom -p dummy:emulate=SST25VF032B -E -V
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Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59708
to look at the new patch set (#8).
Change subject: [RFC][OTP] dummyflasher: add EN25QH128 chip with OTP mode
......................................................................
[RFC][OTP] dummyflasher: add EN25QH128 chip with OTP mode
This chip demonstrates seecond kind of OTP: mode upon entering which
regular read/write/erase commands can be used to interact with OTP
content. It will also be used in tests.
Change-Id: Id5857db43ebf2613bdb5e99342d28d4e0981a6b8
Signed-off-by: Hatim Kanchwala <hatim at hatimak.me>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
M flashrom.8.tmpl
2 files changed, 97 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/08/59708/8
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Hello build bot (Jenkins), Nico Huber, Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59404
to look at the new patch set (#12).
Change subject: [RFC][OTP] dummyflasher: emulate OTP for W25Q128FV
......................................................................
[RFC][OTP] dummyflasher: emulate OTP for W25Q128FV
This adds more or less generic support for OTP emulation to dummyflasher
and immediately uses it to extend emulation for W25Q128FV with
register-based OTP, which will be used in tests.
Files with images for OTP registers can be specified via new otp<N>=
parameters for dummyflasher.
Change-Id: I1af3ac22a66104517f1fe035e034404c6b249257
Signed-off-by: Hatim Kanchwala <hatim at hatimak.me>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
M flashrom.8.tmpl
2 files changed, 182 insertions(+), 23 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/04/59404/12
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Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59072 )
Change subject: dummyflasher: add SR2 emulation harness
......................................................................
Patch Set 16:
(1 comment)
File dummyflasher.c:
https://review.coreboot.org/c/flashrom/+/59072/comment/f0360581_a4d357e4
PS14, Line 346: if (writecnt == 3)
> Just checking, is this condition supposed to be the same as above line 338? They two used to be the […]
Thanks, the two conditions should be in sync.
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58737 )
Change subject: ichspi: Extract initialisation of swseq and hwseq into a function
......................................................................
Patch Set 1: Code-Review+1
(3 comments)
Patchset:
PS1:
Tested probing and reading on Panther Point (7 series PCH).
File ichspi.c:
https://review.coreboot.org/c/flashrom/+/58737/comment/21046c6b_8fff1245
PS1, Line 1786: size_t *num_freg, size_t *num_pr, size_t *reg_pr0,
Technically these are not about sw/hw sequencing. Maybe just rename the
function? Something like init_chipset_properties?
https://review.coreboot.org/c/flashrom/+/58737/comment/bb2af903_218c2d9d
PS1, Line 1787: enum ich_chipset ich_gen)
looks like one space is missing, or is Gerrit fooling me?
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