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Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/55715 )
Change subject: ite_ec: Implement support for flashing ITE ECs found on TUXEDO laptops
......................................................................
Patch Set 24:
(1 comment)
File ite_ecfw.c:
https://review.coreboot.org/c/flashrom/+/55715/comment/4831a1e6_b6ee3984
PS20, Line 332: if (blocks_1_2) {
: itestring->flags.clock_source = CLOCK_SOURCE_INTERNAL;
:
> Maybe, maybe not :S Let's keep it for now but add a comment
The datasheet also says the clock source bit should be always 1. The only path that selects external source is the autoload off when the flash size is larger than 128k. Maybe later we can force the internal oscillator in all paths and remove the comment...
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Thomas Heijligen has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/60110 )
Change subject: hwaccess: move x86 port I/O related code into own files
......................................................................
Patch Set 5:
(1 comment)
File Makefile:
https://review.coreboot.org/c/flashrom/+/60110/comment/6e467f4f_742e6516
PS4, Line 783: ifneq ($(NEED_RAW_ACCESS), )
: # Raw memory, MSR or PCI port I/O access.
: FEATURE_CFLAGS += -D'NEED_RAW_ACCESS=1' -D'__FLASHROM_HAVE_OUTB__=1'
: PROGRAMMER_OBJS += physmap.o hwaccess.o hwaccess_x86_io.o
> > Yes, currently it's disabling all libpci programmer and rayer_spi. […]
`make CONFIG_ENABLE_LIBPCI_PROGRAMMERS=no CONFIG_RAYER_SPI=no` build successful on x86_64 Linux and hwaccess* files are not build as expected.
NEED_RAW_ACCESS is an internal make variable. This should not be overwritten by the user. So `make NEED_RAW_ACCESS=` is not supported. The user should select the programmers to build and the Makefile selects all necessary features for them or disable the programmer when it's not supported on the platform.
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58479 )
Change subject: libflashrom,writeprotect: add flashrom_wp_{read,write}_chip_config()
......................................................................
Patch Set 22:
(1 comment)
File libflashrom.h:
https://review.coreboot.org/c/flashrom/+/58479/comment/a9b4adb1_f81b57e0
PS22, Line 131: const struct flashrom_flashctx *, struct flashrom_wp_chip_config *
Something about APIs in general. We are used to have the destination
argument first. Just like in an assignment where the destination is on
the left-hand side. This also applies to functions added later. Also
to internal functions but we can make exceptions if there is a good
reason.
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Change subject: hwaccess: move x86 port I/O related code into own files
......................................................................
Patch Set 5:
(1 comment)
File Makefile:
https://review.coreboot.org/c/flashrom/+/60110/comment/1565d87a_103a872c
PS4, Line 783: ifneq ($(NEED_RAW_ACCESS), )
: # Raw memory, MSR or PCI port I/O access.
: FEATURE_CFLAGS += -D'NEED_RAW_ACCESS=1' -D'__FLASHROM_HAVE_OUTB__=1'
: PROGRAMMER_OBJS += physmap.o hwaccess.o hwaccess_x86_io.o
> Yes, currently it's disabling all libpci programmer and rayer_spi.
is it realistic to check that such a case builds? does it matter? or maybe you did it already
> Building with `make NEED_RAW_ACCESS=` fails during linking.
Maybe I am missing something, why this is fine? was it always like this, building `make NEED_RAW_ACCESS=` never intent to work?
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Change subject: libflashrom,writeprotect: add flashrom_wp_{read,write}_chip_config()
......................................................................
Patch Set 22:
(1 comment)
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/58479/comment/6957c4a1_1c2f2ed3
PS22, Line 56: struct wp_chip_config *cfg
Only realized this now: this requires the caller to know the size of
`struct wp_chip_config` which is currently not given by `libflashrom.h`.
IMO, we should use dynamic allocation instead, like in the rest of the
API. It will require yet another de-allocation function, but having a
clean, consistent API seems worth it.
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59183 )
Change subject: libflashrom,writeprotect: add flashrom_wp_get_range()
......................................................................
Patch Set 15:
(1 comment)
File writeprotect.c:
https://review.coreboot.org/c/flashrom/+/59183/comment/7fa716a4_c684d1ae
PS15, Line 189: decode_range
We should check here if the pointer is set.
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Change subject: hwaccess: move x86 port I/O related code into own files
......................................................................
Patch Set 5:
(2 comments)
File Makefile:
https://review.coreboot.org/c/flashrom/+/60110/comment/c071fe9e_9a2c1f8f
PS4, Line 783: ifneq ($(NEED_RAW_ACCESS), )
: # Raw memory, MSR or PCI port I/O access.
: FEATURE_CFLAGS += -D'NEED_RAW_ACCESS=1' -D'__FLASHROM_HAVE_OUTB__=1'
: PROGRAMMER_OBJS += physmap.o hwaccess.o hwaccess_x86_io.o
> Mostly curiosity: what is the way to build with NEED_RAW_ACCESS empty? Would that be disabling all t […]
Yes, currently it's disabling all libpci programmer and rayer_spi. Building with `make NEED_RAW_ACCESS=` fails during linking.
On x86 Linux NEED_RAW_ACCESS is enabled by CONFIG_RAYER_SPI which builds by default and all libcpi programmer when libpci is found
File tests/hwaccess_x86_io_unittest.h:
https://review.coreboot.org/c/flashrom/+/60110/comment/f790396a_9fbacab0
PS4, Line 33: int rget_io_perms(void);
> If you could move it below all defines and includes (right above iopl)? thanks!
Done
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Hello build bot (Jenkins), Nico Huber, Angel Pons, Anastasia Klimchuk,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/60110
to look at the new patch set (#5).
Change subject: hwaccess: move x86 port I/O related code into own files
......................................................................
hwaccess: move x86 port I/O related code into own files
Allow port I/O related code to be compiled independent from memory
mapping functionality. This enables for a better selection of needed
hardware access types.
Change-Id: I372b4a409f036da766c42bc406b596bc41b0f75a
Signed-off-by: Thomas Heijligen <thomas.heijligen(a)secunet.com>
---
M Makefile
M amd_imc.c
M atahpt.c
M atapromise.c
M atavia.c
M board_enable.c
M chipset_enable.c
M drkaiser.c
M gfxnvidia.c
M hwaccess.c
M hwaccess.h
A hwaccess_x86_io.c
M hwaccess_x86_io.h
M internal.c
M it8212.c
M it85spi.c
M it87spi.c
M meson.build
M nic3com.c
M nicintel.c
M nicintel_eeprom.c
M nicintel_spi.c
M nicnatsemi.c
M nicrealtek.c
M ogp_spi.c
M programmer.h
M rayer_spi.c
M satamv.c
M satasii.c
M tests/hwaccess_x86_io_unittest.h
M wbsio_spi.c
31 files changed, 118 insertions(+), 69 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/10/60110/5
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