December 2020 - flashrom-gerrit

Change in flashrom[master]: WIP: spi25_statusreg.c: restore SR contents at flashrom exit
by Nikolai Artemiev (Code Review) 13 Jan '21

13 Jan '21

Nikolai Artemiev has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48778 ) Change subject: WIP: spi25_statusreg.c: restore SR contents at flashrom exit ...................................................................... WIP: spi25_statusreg.c: restore SR contents at flashrom exit spi_disable_blockprotect_generic() now uses register_chip_restore() to reset the chip's status register at flashrom exit. Imported from cros flashrom at `b170dd4e1d5c33b169c5` Change-Id: If2f0e73518d40519b7569f627c90a34c364df47c Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> --- M spi25_statusreg.c 1 file changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/48778/1 diff --git a/spi25_statusreg.c b/spi25_statusreg.c index 34f9ad4..5dda912 100644 --- a/spi25_statusreg.c +++ b/spi25_statusreg.c @@ -108,6 +108,12 @@ return readarr[0]; } +static int spi_restore_status(struct flashctx *flash, uint8_t status) +{ + msg_cdbg("restoring chip status (0x%02x)\n", status); + return spi_write_status_register(flash, status); +} + /* A generic block protection disable. * Tests if a protection is enabled with the block protection mask (bp_mask) and returns success otherwise. * Tests if the register bits are locked with the lock_mask (lock_mask). @@ -139,6 +145,9 @@ return 0; } + /* restore status register content upon exit */ + register_chip_restore(spi_restore_status, flash, status); + msg_cdbg("Some block protection in effect, disabling... "); if ((status & lock_mask) != 0) { msg_cdbg("\n\tNeed to disable the register lock first... "); -- To view, visit https://review.coreboot.org/c/flashrom/+/48778 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If2f0e73518d40519b7569f627c90a34c364df47c Gerrit-Change-Number: 48778 Gerrit-PatchSet: 1 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: Makefile: Add a DISABLE_CLOCK_GETTIME option
by Martin Lucina (Code Review) 11 Jan '21

11 Jan '21

Martin Lucina has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48796 ) Change subject: Makefile: Add a DISABLE_CLOCK_GETTIME option ...................................................................... Makefile: Add a DISABLE_CLOCK_GETTIME option Allows to force-disable the use of clock_gettime() at build time, falling back to busy-looping for udelay. This is useful when building for systems which are known to lie about the resolution of clock_gettime(). Change-Id: I645a5d3f29ffdbd24a58127ab73d7d8755304f45 Signed-off-by: Martin Lucina <martin(a)lucina.net> --- M Makefile 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/96/48796/1 diff --git a/Makefile b/Makefile index 1f7ea46..09b2154 100644 --- a/Makefile +++ b/Makefile @@ -1663,12 +1663,17 @@ ( echo "found."; echo "UTSNAME := yes" >> .features.tmp ) || \ ( echo "not found."; echo "UTSNAME := no" >> .features.tmp ) } 2>>$(BUILD_DETAILS_FILE) | tee -a $(BUILD_DETAILS_FILE) @printf "Checking for clock_gettime support... " | tee -a $(BUILD_DETAILS_FILE) +ifeq ($(DISABLE_CLOCK_GETTIME), yes) + @ { ( echo "disabled."; echo "CLOCK_GETTIME := no" >>.features.tmp ) } \ + 2>>$(BUILD_DETAILS_FILE) | tee -a $(BUILD_DETAILS_FILE) +else @echo "$$CLOCK_GETTIME_TEST" >.featuretest.c @printf "\nexec: %s\n" "$(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) -lrt .featuretest.c -o .featuretest$(EXEC_SUFFIX)" >>$(BUILD_DETAILS_FILE) @ { $(CC) $(CPPFLAGS) $(CFLAGS) $(LDFLAGS) -lrt .featuretest.c -o .featuretest$(EXEC_SUFFIX) >&2 && \ ( echo "found."; echo "CLOCK_GETTIME := yes" >>.features.tmp ) || \ ( echo "not found."; echo "CLOCK_GETTIME := no" >>.features.tmp ) } \ 2>>$(BUILD_DETAILS_FILE) | tee -a $(BUILD_DETAILS_FILE) +endif @$(DIFF) -q .features.tmp .features >/dev/null 2>&1 && rm .features.tmp || mv .features.tmp .features @rm -f .featuretest.c .featuretest$(EXEC_SUFFIX) -- To view, visit https://review.coreboot.org/c/flashrom/+/48796 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I645a5d3f29ffdbd24a58127ab73d7d8755304f45 Gerrit-Change-Number: 48796 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Lucina <martin(a)lucina.net> Gerrit-MessageType: newchange

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Change in flashrom[master]: realtek_mst_i2c_spi.c: Make consistent with std=c99
by Edward O'Callaghan (Code Review) 10 Jan '21

10 Jan '21

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/47909 ) Change subject: realtek_mst_i2c_spi.c: Make consistent with std=c99 ...................................................................... realtek_mst_i2c_spi.c: Make consistent with std=c99 Use 'modern' C to scope iterator declarations only to the loop constructs they are used in. BUG=none TEST=builds Change-Id: I9d9d1bf01209a7840f7b3fa2c6f7592375a74330 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M realtek_mst_i2c_spi.c 1 file changed, 4 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/09/47909/1 diff --git a/realtek_mst_i2c_spi.c b/realtek_mst_i2c_spi.c index 538b07a..151f7f6 100644 --- a/realtek_mst_i2c_spi.c +++ b/realtek_mst_i2c_spi.c @@ -205,7 +205,6 @@ const unsigned char *writearr, unsigned char *readarr) { - unsigned i; int max_timeout_mul = 1; int ret = 0; @@ -262,7 +261,7 @@ ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val); ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, writearr[0]); /* opcode */ - for (i = 0; i < writecnt; ++i) + for (unsigned i = 0; i < writecnt; ++i) ret |= realtek_mst_i2c_spi_write_register(fd, 0x64 + i, writearr[i + 1]); ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val | 0x1); if (ret) @@ -272,7 +271,7 @@ if (ret) return ret; - for (i = 0; i < readcnt; ++i) + for (unsigned i = 0; i < readcnt; ++i) ret |= realtek_mst_i2c_spi_read_register(fd, 0x67 + i, &readarr[i]); return ret; @@ -306,7 +305,6 @@ static int realtek_mst_i2c_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - unsigned i; int ret = 0; if (start & 0xff) @@ -339,7 +337,7 @@ uint8_t dummy; realtek_mst_i2c_spi_read_register(fd, MCU_DATA_PORT, &dummy); - for (i = 0; i < len; i += PAGE_SIZE) { + for (unsigned i = 0; i < len; i += PAGE_SIZE) { ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS, buf + i, min(len - i, PAGE_SIZE)); if (ret) @@ -352,7 +350,6 @@ static int realtek_mst_i2c_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) { - unsigned i; int ret = 0; if (start & 0xff) @@ -369,7 +366,7 @@ ret |= realtek_mst_i2c_spi_write_register(fd, 0x6D, 0x02); /* write opcode */ ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, (PAGE_SIZE - 1)); /* fit len=256 */ - for (i = 0; i < len; i += PAGE_SIZE) { + for (unsigned i = 0; i < len; i += PAGE_SIZE) { uint16_t page_len = min(len - i, PAGE_SIZE); if (len - i < PAGE_SIZE) ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, page_len-1); -- To view, visit https://review.coreboot.org/c/flashrom/+/47909 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9d9d1bf01209a7840f7b3fa2c6f7592375a74330 Gerrit-Change-Number: 47909 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: lspcon_i2c_spi.c: Make consistent with std=c99
by Edward O'Callaghan (Code Review) 10 Jan '21

10 Jan '21

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/47910 ) Change subject: lspcon_i2c_spi.c: Make consistent with std=c99 ...................................................................... lspcon_i2c_spi.c: Make consistent with std=c99 Use 'modern' C to scope iterator declarations only to the loop constructs they are used in. BUG=none TEST=builds Change-Id: Id61f8416416d2f625d424760e00f94dc730105f4 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> --- M lspcon_i2c_spi.c 1 file changed, 3 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/10/47910/1 diff --git a/lspcon_i2c_spi.c b/lspcon_i2c_spi.c index 7b9f1c0..6ee2840 100644 --- a/lspcon_i2c_spi.c +++ b/lspcon_i2c_spi.c @@ -127,14 +127,13 @@ static int lspcon_i2c_spi_register_control(int fd, packet_t *packet) { - int i; int ret = lspcon_i2c_spi_write_register(fd, SWSPI_WDATA, packet->command); if (ret) return ret; /* Higher 4 bits are read size. */ int write_size = packet->data_size & 0x0f; - for (i = 0; i < write_size; ++i) { + for (unsigned i = 0; i < write_size; ++i) { ret |= lspcon_i2c_spi_write_register(fd, SWSPI_WDATA, packet->data[i]); } @@ -256,7 +255,6 @@ const unsigned char *writearr, unsigned char *readarr) { - unsigned int i; if (writecnt > 16 || readcnt > 16 || writecnt == 0) { msg_perr("%s: Invalid read/write count for send command.\n", __func__); @@ -285,7 +283,7 @@ if (ret) return ret; - for (i = 0; i < readcnt; ++i) { + for (unsigned i = 0; i < readcnt; ++i) { ret |= lspcon_i2c_spi_read_register(fd, SWSPI_RDATA, &readarr[i]); } @@ -340,7 +338,6 @@ static int lspcon_i2c_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len) { - unsigned int i; int ret = 0; if (start & 0xff) return default_spi_read(flash, buf, start, len); @@ -349,7 +346,7 @@ if (fd < 0) return SPI_GENERIC_ERROR; - for (i = 0; i < len; i += PAGE_SIZE) { + for (unsigned i = 0; i < len; i += PAGE_SIZE) { ret |= lspcon_i2c_spi_map_page(fd, start + i); ret |= lspcon_i2c_spi_read_data(fd, PAGE_ADDRESS, buf + i, min(len - i, PAGE_SIZE)); } -- To view, visit https://review.coreboot.org/c/flashrom/+/47910 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id61f8416416d2f625d424760e00f94dc730105f4 Gerrit-Change-Number: 47910 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips: upstream AT25SF128A from chromiumos
by Alan Green (Code Review) 06 Jan '21

06 Jan '21

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/37543 ) Change subject: flashchips: upstream AT25SF128A from chromiumos ...................................................................... flashchips: upstream AT25SF128A from chromiumos Upstream the AT25SF128A chip from chromiumos repository. Change-Id: I6349aa41eee0c997aaa507383aff7ce26441d24f --- M flashchips.c M flashchips.h 2 files changed, 39 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/43/37543/1 diff --git a/flashchips.c b/flashchips.c index 4324c11..fc4cdff 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2293,6 +2293,44 @@ { .vendor = "Atmel", + .name = "AT25SF128A", + .bustype = BUS_SPI, + .manufacture_id = ATMEL_ID, + .model_id = ATMEL_AT25SF128A, + .total_size = 16384, + .page_size = 256, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .tested = TEST_OK_PR, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_bp4_srwd, + .unlock = spi_disable_blockprotect_bp4_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1700, 2000}, + }, + + { + .vendor = "Atmel", .name = "AT25SF161", .bustype = BUS_SPI, .manufacture_id = ATMEL_ID, diff --git a/flashchips.h b/flashchips.h index 2c2da6c..5609527 100644 --- a/flashchips.h +++ b/flashchips.h @@ -151,6 +151,7 @@ #define ATMEL_AT25SF081 0x8501 #define ATMEL_AT25SF161 0x8601 #define ATMEL_AT25SL128A 0x4218 +#define ATMEL_AT25SF128A 0x8901 /* Adesto AT25SF128A */ #define ATMEL_AT26DF041 0x4400 #define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */ #define ATMEL_AT26DF081A 0x4501 -- To view, visit https://review.coreboot.org/c/flashrom/+/37543 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I6349aa41eee0c997aaa507383aff7ce26441d24f Gerrit-Change-Number: 37543 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips.c: Take GD25LQ128C/D from downstream
by Alan Green (Code Review) 06 Jan '21

06 Jan '21

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/35478 ) Change subject: flashchips.c: Take GD25LQ128C/D from downstream ...................................................................... flashchips.c: Take GD25LQ128C/D from downstream Take the diffs for GD25LQ128C/D from the ChromiumOS flashrom repo. This chips was added in Chromium OS `commit 62cd8106` by furquan(a)google.com on 2016-07-18, and has been marked tested. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: I4358392520507ddbfc654feb49fa982d49db2f28 --- M flashchips.c 1 file changed, 2 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/78/35478/1 diff --git a/flashchips.c b/flashchips.c index 3994c93..5c797fd 100644 --- a/flashchips.c +++ b/flashchips.c @@ -5894,7 +5894,7 @@ .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, - .tested = TEST_UNTESTED, + .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, .block_erasers = @@ -5916,8 +5916,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1695, 1950}, -- To view, visit https://review.coreboot.org/c/flashrom/+/35478 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I4358392520507ddbfc654feb49fa982d49db2f28 Gerrit-Change-Number: 35478 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: flashchips.c: Take GD25LQ40 from downstream
by Alan Green (Code Review) 06 Jan '21

06 Jan '21

Alan Green has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/35479 ) Change subject: flashchips.c: Take GD25LQ40 from downstream ...................................................................... flashchips.c: Take GD25LQ40 from downstream Take definition of GD25LQ40 from ChromiumOS repository. This chip was added in `commit 59543cd1` by dnschneid(a)chromium.org on 2016-04-27. The commit message notes that some testing had been done, even thought the .tested attribute was left as UNTESTED. Signed-off-by: Alan Green <avg(a)google.com> Change-Id: I978745b38536cda807adf07af4e4d093d0d93ad1 --- M flashchips.c 1 file changed, 2 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/79/35479/1 diff --git a/flashchips.c b/flashchips.c index 5c797fd..ac07fa8 100644 --- a/flashchips.c +++ b/flashchips.c @@ -6009,7 +6009,7 @@ .total_size = 512, .page_size = 256, /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP, + .feature_bits = FEATURE_WRSR_WREN, .tested = TEST_UNTESTED, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -6032,8 +6032,7 @@ .block_erase = spi_block_erase_c7, } }, - .printlock = spi_prettyprint_status_register_bp4_srwd, - .unlock = spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */ + .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ .voltage = {1695, 1950}, -- To view, visit https://review.coreboot.org/c/flashrom/+/35479 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I978745b38536cda807adf07af4e4d093d0d93ad1 Gerrit-Change-Number: 35479 Gerrit-PatchSet: 1 Gerrit-Owner: Alan Green <avg(a)google.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: realtek_mst_i2c_spi.c: Consolidate shifts to the one fn
by Edward O'Callaghan (Code Review) 02 Jan '21

02 Jan '21

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48975 ) Change subject: realtek_mst_i2c_spi.c: Consolidate shifts to the one fn ...................................................................... realtek_mst_i2c_spi.c: Consolidate shifts to the one fn To avoid further incorrect mappings ensure all the shifting happens within realtek_mst_i2c_spi_map_page() itself. BUG=none BRANCH=none TEST=builds Change-Id: I96c595b1abae044347fb0c2c91b891a60dd3675e Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Suggested-by: Angel Pons <th3fanbus(a)gmail.com> --- M realtek_mst_i2c_spi.c 1 file changed, 8 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/75/48975/1 diff --git a/realtek_mst_i2c_spi.c b/realtek_mst_i2c_spi.c index 3e84b23..418e23a 100644 --- a/realtek_mst_i2c_spi.c +++ b/realtek_mst_i2c_spi.c @@ -289,9 +289,14 @@ return ret; } -static int realtek_mst_i2c_spi_map_page(int fd, uint8_t block_idx, uint8_t page_idx, uint8_t byte_idx) +static int realtek_mst_i2c_spi_map_page(int fd, uint32_t addr) { int ret = 0; + + uint8_t block_idx = (addr >> 16) & 0xff; + uint8_t page_idx = (addr >> 8) & 0xff; + uint8_t byte_idx = addr & 0xff; + ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE2, block_idx); ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE1, page_idx); ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE0, byte_idx); @@ -330,10 +335,7 @@ start--; ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x46); // ** ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, OPCODE_READ); - uint8_t block_idx = (start >> 16) & 0xff; - uint8_t page_idx = (start >> 8) & 0xff; - uint8_t byte_idx = start & 0xff; - ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx); + ret |= realtek_mst_i2c_spi_map_page(fd, start); ret |= realtek_mst_i2c_spi_write_register(fd, 0x6a, 0x03); ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x47); // ** if (ret) @@ -384,10 +386,7 @@ uint16_t page_len = min(len - i, PAGE_SIZE); if (len - i < PAGE_SIZE) ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, page_len-1); - uint8_t block_idx = ((start + i) >> 16) & 0xff; - uint8_t page_idx = ((start + i) >> 8) & 0xff; - uint8_t byte_idx = (start + i) & 0xff; - ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx); + ret |= realtek_mst_i2c_spi_map_page(fd, (start + i)); if (ret) break; -- To view, visit https://review.coreboot.org/c/flashrom/+/48975 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I96c595b1abae044347fb0c2c91b891a60dd3675e Gerrit-Change-Number: 48975 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: realtek_mst_i2c_spi.c: Don't depend on int overflows
by Edward O'Callaghan (Code Review) 02 Jan '21

02 Jan '21

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48974 ) Change subject: realtek_mst_i2c_spi.c: Don't depend on int overflows ...................................................................... realtek_mst_i2c_spi.c: Don't depend on int overflows Be explicit to mask the first byte after the shifts as highlighted by Angel Pos. BUG=none BRANCH=none TEST=builds Change-Id: I7d1215678094d709e79b8f8c96aa3810586cd72e Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Spotted-by: Angel Pons <th3fanbus(a)gmail.com> --- M realtek_mst_i2c_spi.c 1 file changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/48974/1 diff --git a/realtek_mst_i2c_spi.c b/realtek_mst_i2c_spi.c index dabec70..3e84b23 100644 --- a/realtek_mst_i2c_spi.c +++ b/realtek_mst_i2c_spi.c @@ -330,9 +330,9 @@ start--; ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x46); // ** ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, OPCODE_READ); - uint8_t block_idx = start >> 16; - uint8_t page_idx = start >> 8; - uint8_t byte_idx = start; + uint8_t block_idx = (start >> 16) & 0xff; + uint8_t page_idx = (start >> 8) & 0xff; + uint8_t byte_idx = start & 0xff; ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx); ret |= realtek_mst_i2c_spi_write_register(fd, 0x6a, 0x03); ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x47); // ** @@ -384,9 +384,9 @@ uint16_t page_len = min(len - i, PAGE_SIZE); if (len - i < PAGE_SIZE) ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, page_len-1); - uint8_t block_idx = (start + i) >> 16; - uint8_t page_idx = (start + i) >> 8; - uint8_t byte_idx = start + i; + uint8_t block_idx = ((start + i) >> 16) & 0xff; + uint8_t page_idx = ((start + i) >> 8) & 0xff; + uint8_t byte_idx = (start + i) & 0xff; ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx); if (ret) break; -- To view, visit https://review.coreboot.org/c/flashrom/+/48974 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7d1215678094d709e79b8f8c96aa3810586cd72e Gerrit-Change-Number: 48974 Gerrit-PatchSet: 1 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newchange

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Change in flashrom[master]: ichspi: print transaction error in debug mode
by Jonathan Zhang (Code Review) 01 Jan '21

01 Jan '21

Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/49001 ) Change subject: ichspi: print transaction error in debug mode ...................................................................... ichspi: print transaction error in debug mode When "--fmap" option is used, flashrom does binary search in flash for fmap. When it reads flash region that is locked, transaction error happens. Print transaction error in debug mode, so that following message: Transaction error between offset 0x02cb4000 and 0x02cb4007 (= 0x02cb4000 + 7)! shows up only when "-V" is specified. Change-Id: Iebed1ae7f15b7f06b90a0b5947b953f7f0e1567d Signed-off-by: Jonathan Zhang <jonzhang(a)fb.com> --- M ichspi.c 1 file changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/01/49001/1 diff --git a/ichspi.c b/ichspi.c index 4209d60..6dde7b2 100644 --- a/ichspi.c +++ b/ichspi.c @@ -1311,11 +1311,17 @@ if (hsfs & HSFS_FCERR) { addr = REGREAD32(ICH9_REG_FADDR) & hwseq_data.addr_mask; - msg_perr("Transaction error between offset 0x%08x and " + + /* + * If the partition is locked, this transaction error happens. + * Print in verbose mode to avoid excessive messages. + */ + msg_cdbg("Transaction error between offset 0x%08x and " "0x%08x (= 0x%08x + %d)!\n", addr, addr + len - 1, addr, len - 1); prettyprint_ich9_reg_hsfs(hsfs, ich_gen); prettyprint_ich9_reg_hsfc(REGREAD16(ICH9_REG_HSFC), ich_gen); + return 1; } return 0; -- To view, visit https://review.coreboot.org/c/flashrom/+/49001 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Iebed1ae7f15b7f06b90a0b5947b953f7f0e1567d Gerrit-Change-Number: 49001 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-MessageType: newchange

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