Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/17953 )
Change subject: Add option to read ROM layout from IFD
......................................................................
Patch Set 13:
here is the output https://paste.flashrom.org/view.php?id=3039
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/17953 )
Change subject: Add option to read ROM layout from IFD
......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/#/c/17953/13/ich_descriptors.c
File ich_descriptors.c:
PS13, Line 948: min(desc.content.NR + 1, ARRAY_SIZE(regions))
> Um, no... `j` is used to index `layout->entries` and thus definitely
What I have is a Flash_Descriptor, a BIOS, and a GbE and no ME. content.NR == 2 so it won't get to GbE...
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/17953 )
Change subject: Add option to read ROM layout from IFD
......................................................................
Patch Set 13:
(1 comment)
> Using 'Flash_Descriptor' works, but still invalid for GbE which
> after some debugging seems to be absent from the layout struct.
Please paste a full log (taken with `-o logfile`). Which descrip-
tor generation is it (in the flash)?
https://review.coreboot.org/#/c/17953/13/ich_descriptors.c
File ich_descriptors.c:
PS13, Line 948: min(desc.content.NR + 1, ARRAY_SIZE(regions))
> This seems to cause the problem. would i < ARRAY_SIZE(regions) && j < desc.
Um, no... `j` is used to index `layout->entries` and thus definitely
must not rely on `desc` (only).
The code looks correct (for pre-Skylake descriptors). Maybe the issue
is somewhere else? I might have broken something in read_ich_
descriptors_from_dump()...
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/19044 )
Change subject: ich_descriptors: Fix more odd +1's
......................................................................
Patch Set 3: Code-Review-1
(3 comments)
Sorry, it's still confusing...
https://review.coreboot.org/#/c/19044/3/ich_descriptors.c
File ich_descriptors.c:
PS3, Line 620:
Just realized that I killed this whitespace by accident.
PS3, Line 619: sizeof(desc->north.STRPs) / 4
Isn't it just ARRAY_SIZE()?
PS3, Line 619: + 1
This seems off, too.
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/17953 )
Change subject: Add option to read ROM layout from IFD
......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/#/c/17953/13/ich_descriptors.c
File ich_descriptors.c:
PS13, Line 948: min(desc.content.NR + 1, ARRAY_SIZE(regions))
This seems to cause the problem. would i < ARRAY_SIZE(regions) && j < desc.content.NR + 1 what it should be?
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/17953 )
Change subject: Add option to read ROM layout from IFD
......................................................................
Patch Set 13:
Using 'Flash_Descriptor' works, but still invalid for GbE which after some debugging seems to be absent from the layout struct.
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/17945 )
Change subject: Add functions to read/erase/write/verify by layout
......................................................................
Patch Set 10: Code-Review+1
Tested with read and verify.
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/17953 )
Change subject: Add option to read ROM layout from IFD
......................................................................
Patch Set 13:
Works fine with with --ifd -i BIOS, but with GbE and Descr. it says Invalid region selected. Is this intended? (both GbE and IFD are unlocked)
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