May 2017 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[staging]: ichspi: Drop `dev` parameter from init functions
by David Hendricks (Code Review) 03 May '17

03 May '17

David Hendricks has posted comments on this change. ( https://review.coreboot.org/19460 ) Change subject: ichspi: Drop `dev` parameter from init functions ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/19460 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I0d4e7cc731364e86eff214b9022b842a577f9ef4 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in flashrom[staging]: Handle Intel Wildcat Point *LP* like Lynx Point LP
by David Hendricks (Code Review) 03 May '17

03 May '17

David Hendricks has posted comments on this change. ( https://review.coreboot.org/18883 ) Change subject: Handle Intel Wildcat Point *LP* like Lynx Point LP ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/18883 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I6b7ca3c0bde111b04ed7c745ed76d28d3d05f01c Gerrit-PatchSet: 5 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in flashrom[staging]: ich_descriptors: Fix more odd +1's
by David Hendricks (Code Review) 03 May '17

03 May '17

David Hendricks has posted comments on this change. ( https://review.coreboot.org/19044 ) Change subject: ich_descriptors: Fix more odd +1's ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/19044 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ifa5455c999e90ff9121aed29f542d71ac9ca2b1c Gerrit-PatchSet: 3 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in flashrom[staging]: ich_descriptors: Fix range checks for dumps
by David Hendricks (Code Review) 03 May '17

03 May '17

David Hendricks has posted comments on this change. ( https://review.coreboot.org/19031 ) Change subject: ich_descriptors: Fix range checks for dumps ...................................................................... Patch Set 4: Code-Review+2 (3 comments) Looks like parts of the code need to be updated, but it looks like you're already doing that in some follow-up patches so feel free to ignore the comments. https://review.coreboot.org/#/c/19031/4/ich_descriptors.c File ich_descriptors.c: PS4, Line 739: desc->component.FLPB = dump[(getFCBA(&desc->content) >> 2) + 2]; Side note: This field seems to be absent in many of the most recent PCHes, so that might confuse the length check for code intended for newer platforms. Line 748: desc->region.FLREGs[4] = dump[(getFRBA(&desc->content) >> 2) + 4]; A couple more FLREGs have been added in recent PCHes. Line 755: desc->master.FLMSTR3 = dump[(getFMBA(&desc->content) >> 2) + 2]; Same as above - More have been added. -- To view, visit https://review.coreboot.org/19031 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: If57c92ba28f91c4d72123ef0cfd2d9d5ac0a0656 Gerrit-PatchSet: 4 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in flashrom[stable]: Obtain correct virtual address for 32-bit BARs on PPC
by Nico Huber (Code Review) 02 May '17

02 May '17

Nico Huber has posted comments on this change. ( https://review.coreboot.org/19526 ) Change subject: Obtain correct virtual address for 32-bit BARs on PPC ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/19526/1/pcidev.c File pcidev.c: Line 106: addr = dev->base_addr[(bar - 0x10) / 0x4] & PCI_BASE_ADDRESS_MEM_MASK; >From my understanding of the libpci API (which is sparsely docu- mented), the usage of `base_addr` should be preceded by a check of `dev->known_fields` and a call to pci_fill_info() if it's not filled yet. Also, I guess, your assumption that `base_addr` works is only true when an appropriate libpci access method is used. Which we leave at the default PCI_ACCESS_AUTO before the call to pci_init(). I would expect that PCI_ACCESS_SYS_BUS_PCI works, but enforcing that might not work on all OS. I guess what we need is to check with pci_get_method_name() if PCI_ACCESS_SYS_BUS_PCI (or whatever you need) is available (it will return "" if not) and fallback to PCI_ACCESS_AUTO if not. -- To view, visit https://review.coreboot.org/19526 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I7a37ae98f54aab62e0937985220d1dcd097109f3 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: stable Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in flashrom[stable]: Fix erase block structure on Spansion S25FL128P
by Timothy Pearson (Code Review) 02 May '17

02 May '17

Timothy Pearson has posted comments on this change. ( https://review.coreboot.org/19531 ) Change subject: Fix erase block structure on Spansion S25FL128P ...................................................................... Patch Set 2: Code-Review-2 > >> I think what you have is a S25FL128P......0 the 0 marks 64KiB > sectors. > > > > The exact part number printed on the Flash chip is: > > Spansion FL128P1F > > > > Is the "P1" a red herring? If so, perhaps the Flashrom sources > > need a comment to help with this confusing aspect of the device > > naming. > > I guess it's PI and the I is for Industrial temperature range. It's > all > in the datasheet ("Package Marking"). The chip you are editing > should > have a FL128PIFL marking. And yes, a comment with the package > marking > would be helpful. The chip I have here is missing the trailing L, and the "I" really looks like a 1, but what you're describing seems reasonable looking at the code. I'll just chalk this up to a poor marking job at the factory and give the other chip name a test / update the patch to mark it verified if it works. -- To view, visit https://review.coreboot.org/19531 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4b4e3673f7019f38a3b6ab2f7002bbe56dc6de07 Gerrit-PatchSet: 2 Gerrit-Project: flashrom Gerrit-Branch: stable Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in flashrom[stable]: Fix erase block structure on Spansion S25FL128P
by Nico Huber (Code Review) 02 May '17

02 May '17

Nico Huber has posted comments on this change. ( https://review.coreboot.org/19531 ) Change subject: Fix erase block structure on Spansion S25FL128P ...................................................................... Patch Set 2: >> I think what you have is a S25FL128P......0 the 0 marks 64KiB sectors. > > The exact part number printed on the Flash chip is: > Spansion FL128P1F > > Is the "P1" a red herring? If so, perhaps the Flashrom sources > need a comment to help with this confusing aspect of the device > naming. I guess it's PI and the I is for Industrial temperature range. It's all in the datasheet ("Package Marking"). The chip you are editing should have a FL128PIFL marking. And yes, a comment with the package marking would be helpful. -- To view, visit https://review.coreboot.org/19531 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I4b4e3673f7019f38a3b6ab2f7002bbe56dc6de07 Gerrit-PatchSet: 2 Gerrit-Project: flashrom Gerrit-Branch: stable Gerrit-Owner: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in flashrom[staging]: flashchips: Add ISSI IS25WP128
by David Hendricks (Code Review) 02 May '17

02 May '17

David Hendricks has posted comments on this change. ( https://review.coreboot.org/19532 ) Change subject: flashchips: Add ISSI IS25WP128 ...................................................................... Patch Set 1: Code-Review-2 Uploaded for convenience only for now... -- To view, visit https://review.coreboot.org/19532 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia31764f0bf3ba1ed609f83b95e21343d7c23a508 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in flashrom[staging]: flashchips: Add ISSI IS25WP128
by build bot (Jenkins) (Code Review) 02 May '17

02 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19532 ) Change subject: flashchips: Add ISSI IS25WP128 ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/flashrom_gerrit/303/ : FAILURE https://qa.coreboot.org/job/flashrom-customrules/295/ : SUCCESS -- To view, visit https://review.coreboot.org/19532 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia31764f0bf3ba1ed609f83b95e21343d7c23a508 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in flashrom[staging]: flashchips: Add ISSI IS25WP128
by David Hendricks (Code Review) 02 May '17

02 May '17

David Hendricks has uploaded a new change for review. ( https://review.coreboot.org/19532 ) Change subject: flashchips: Add ISSI IS25WP128 ...................................................................... flashchips: Add ISSI IS25WP128 Tested read, erase, and write using Dediprog SF600 Change-Id: Ia31764f0bf3ba1ed609f83b95e21343d7c23a508 Signed-off-by: David Hendricks <dhendricks(a)fb.com> --- M flashchips.c M flashchips.h 2 files changed, 43 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/32/19532/1 diff --git a/flashchips.c b/flashchips.c index 40b6b8e..8aa3e78 100644 --- a/flashchips.c +++ b/flashchips.c @@ -7082,6 +7082,47 @@ { .vendor = "ISSI", + .name = "IS25WP128", + .bustype = BUS_SPI, + .manufacture_id = ISSI_ID_SPI, + .model_id = ISSI_IS25WP128, + .total_size = 16384, + .page_size = 256, + /* OTP: 1024B total; read 0x48; write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_UNBOUND_READ | FEATURE_OTP, + .tested = TEST_OK_PREWU, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_20, + }, { + .eraseblocks = { {4 * 1024, 4096} }, + .block_erase = spi_block_erase_d7, + }, { + .eraseblocks = { {32 * 1024, 512} }, + .block_erase = spi_block_erase_52, + }, { + .eraseblocks = { {64 * 1024, 256} }, + .block_erase = spi_block_erase_d8, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {16 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .unlock = spi_disable_blockprotect, + .write = spi_chip_write_256, + .read = spi_chip_read, + .voltage = {1650, 1950}, + }, + + { + .vendor = "ISSI", .name = "IS29GL064B", .bustype = BUS_PARALLEL, .manufacture_id = ISSI_ID, diff --git a/flashchips.h b/flashchips.h index 9ffb30f..ed99d5e 100644 --- a/flashchips.h +++ b/flashchips.h @@ -452,6 +452,8 @@ #define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */ #define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions, see also PMC. */ +#define ISSI_ID_SPI 0x9D /* ISSI ID used for SPI flash, see also PMC_ID_NOPREFIX */ +#define ISSI_IS25WP128 0x7018 #define ISSI_PMC_IS29GL032B 0xF9 #define ISSI_PMC_IS29GL032T 0xF6 #define ISSI_PMC_IS29GL064B 0x7E1000 -- To view, visit https://review.coreboot.org/19532 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Ia31764f0bf3ba1ed609f83b95e21343d7c23a508 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com>

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flashrom-gerrit May 2017