October 2017 - flashrom-gerrit

Change in flashrom[staging]: spi25: Add native 4BA support
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22020 ) Change subject: spi25: Add native 4BA support ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/698/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/776/ : SUCCESS -- To view, visit https://review.coreboot.org/22020 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1 Gerrit-Change-Number: 22020 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:23:53 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Introduce spi_simple_write_cmd()
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22018 ) Change subject: spi25: Introduce spi_simple_write_cmd() ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/699/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/775/ : SUCCESS -- To view, visit https://review.coreboot.org/22018 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Ib244356fa471e15863b52e6037899d19113cb4a9 Gerrit-Change-Number: 22018 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:23:49 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Use common code for nbyte read/write and erase
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22019 ) Change subject: spi25: Use common code for nbyte read/write and erase ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/697/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/774/ : SUCCESS -- To view, visit https://review.coreboot.org/22019 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Ibc1ae48acbfbd427a30bcd64bdc080dc3dc20503 Gerrit-Change-Number: 22019 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:23:43 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25_statusreg: Return defined value on failed RDSR
by build bot (Jenkins) (Code Review) 15 Oct '17

15 Oct '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22017 ) Change subject: spi25_statusreg: Return defined value on failed RDSR ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/696/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/773/ : SUCCESS -- To view, visit https://review.coreboot.org/22017 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I714b20001a5443bba665c2e0061ca14069777581 Gerrit-Change-Number: 22017 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 11:23:38 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: spi25: Merge remainder of spi4ba in
by Nico Huber (Code Review) 15 Oct '17

15 Oct '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22024 Change subject: spi25: Merge remainder of spi4ba in ...................................................................... spi25: Merge remainder of spi4ba in Change-Id: If581e24347e45cbb27002ea99ffd70e334c110cf Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M Makefile M chipdrivers.h M flashchips.c M spi.h M spi25.c D spi4ba.c D spi4ba.h 7 files changed, 122 insertions(+), 454 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/24/22024/1 diff --git a/Makefile b/Makefile index 5573127..9184bb3 100644 --- a/Makefile +++ b/Makefile @@ -514,7 +514,7 @@ CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \ sst28sf040.o 82802ab.o \ sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \ - spi4ba.o opaque.o sfdp.o en29lv640b.o at45db.o + opaque.o sfdp.o en29lv640b.o at45db.o ############################################################################### # Library code. diff --git a/chipdrivers.h b/chipdrivers.h index 12fc5a3..d7a4aa9 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -43,8 +43,10 @@ int spi_write_enable(struct flashctx *flash); int spi_write_disable(struct flashctx *flash); int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_21(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_5c(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_60(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_62(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen); @@ -53,11 +55,17 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); +int spi_enter_4ba_b7(struct flashctx *flash); +int spi_enter_4ba_b7_we(struct flashctx *flash); +int spi_exit_4ba_e9(struct flashctx *flash); +int spi_exit_4ba_e9_we(struct flashctx *flash); + /* spi25_statusreg.c */ uint8_t spi_read_status_register(struct flashctx *flash); @@ -192,29 +200,5 @@ /* en29lv640b.c */ int probe_en29lv640b(struct flashctx *flash); int write_en29lv640b(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); - -/* spi4ba.c */ -int spi_enter_4ba_b7(struct flashctx *flash); -int spi_enter_4ba_b7_we(struct flashctx *flash); -int spi_exit_4ba_e9(struct flashctx *flash); -int spi_exit_4ba_e9_we(struct flashctx *flash); -int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_byte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_block_erase_20_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_52_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_d8_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_byte_program_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba_direct(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); -int spi_block_erase_21_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); #endif /* !__CHIPDRIVERS_H__ */ diff --git a/flashchips.c b/flashchips.c index a7fdf1c..5c100b5 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9759,10 +9759,10 @@ .block_erasers = { { .eraseblocks = { {4 * 1024, 8192} }, - .block_erase = spi_block_erase_21_4ba_direct, + .block_erase = spi_block_erase_21, }, { .eraseblocks = { {64 * 1024, 512} }, - .block_erase = spi_block_erase_dc_4ba_direct, + .block_erase = spi_block_erase_dc, }, { .eraseblocks = { {32768 * 1024, 1} }, .block_erase = spi_block_erase_c7, @@ -9792,10 +9792,10 @@ .block_erasers = { { .eraseblocks = { {4 * 1024, 16384} }, - .block_erase = spi_block_erase_21_4ba_direct, + .block_erase = spi_block_erase_21, }, { .eraseblocks = { {64 * 1024, 1024} }, - .block_erase = spi_block_erase_dc_4ba_direct, + .block_erase = spi_block_erase_dc, }, { .eraseblocks = { {65536 * 1024, 1} }, .block_erase = spi_block_erase_c7, diff --git a/spi.h b/spi.h index 41b0245..4da7b73 100644 --- a/spi.h +++ b/spi.h @@ -138,6 +138,18 @@ #define JEDEC_WRSR_OUTSIZE 0x02 #define JEDEC_WRSR_INSIZE 0x00 +/* Enter 4-byte Address Mode */ +#define JEDEC_ENTER_4_BYTE_ADDR_MODE 0xB7 + +/* Exit 4-byte Address Mode */ +#define JEDEC_EXIT_4_BYTE_ADDR_MODE 0xE9 + +/* Write Extended Address Register */ +#define JEDEC_WRITE_EXT_ADDR_REG 0xC5 + +/* Read Extended Address Register */ +#define JEDEC_READ_EXT_ADDR_REG 0xC8 + /* Read the memory */ #define JEDEC_READ 0x03 #define JEDEC_READ_OUTSIZE 0x04 @@ -154,6 +166,14 @@ #define JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE 0x03 #define JEDEC_AAI_WORD_PROGRAM_INSIZE 0x00 +/* Read the memory with 4-byte address + From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ +#define JEDEC_READ_4BA 0x13 + +/* Write memory byte with 4-byte address + From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ +#define JEDEC_BYTE_PROGRAM_4BA 0x12 + /* Error codes */ #define SPI_GENERIC_ERROR -1 #define SPI_INVALID_OPCODE -2 diff --git a/spi25.c b/spi25.c index 98b314d..8d9d54b 100644 --- a/spi25.c +++ b/spi25.c @@ -29,7 +29,6 @@ #include "chipdrivers.h" #include "programmer.h" #include "spi.h" -#include "spi4ba.h" static int spi_rdid(struct flashctx *flash, unsigned char *readarr, int bytes) { @@ -350,9 +349,31 @@ if (result) msg_cerr("%s failed during command execution\n", __func__); - const int status = spi_write_status(flash, poll_delay); + const int status = poll_delay ? spi_write_status(flash, poll_delay) : 0; return result ? result : status; +} + +static int spi_write_extended_address_register(struct flashctx *const flash, const uint8_t regdata) +{ + struct spi_command cmds[] = { + { + .writecnt = 1, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + }, { + .writecnt = 2, + .writearr = (const unsigned char[]){ + JEDEC_WRITE_EXT_ADDR_REG, + regdata + }, + }, + NULL_SPI_CMD, + }; + + const int result = spi_send_multicommand(flash, cmds); + if (result) + msg_cerr("%s failed during command execution\n", __func__); + return result; } static int spi_set_extended_address(struct flashctx *const flash, const uint8_t addr_high) @@ -539,6 +560,36 @@ return spi_chip_erase_c7(flash); } +/* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) + JEDEC_SE_4BA (21h) instruction is new for 4-bytes addressing flash chips. + The presence of this instruction for an exact chip should be checked + by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ +int spi_block_erase_21(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + /* This usually takes 15-800ms, so wait in 10ms steps. */ + return spi_write_cmd(flash, 0x21, addr, NULL, 0, 10 * 1000); +} + +/* Erase 32 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) + JEDEC_BE_5C_4BA (5Ch) instruction is new for 4-bytes addressing flash chips. + The presence of this instruction for an exact chip should be checked + by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ +int spi_block_erase_5c(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + /* This usually takes 100-4000ms, so wait in 100ms steps. */ + return spi_write_cmd(flash, 0x5c, addr, NULL, 0, 100 * 1000); +} + +/* Erase 64 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) + JEDEC_BE_DC_4BA (DCh) instruction is new for 4-bytes addressing flash chips. + The presence of this instruction for an exact chip should be checked + by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ +int spi_block_erase_dc(struct flashctx *flash, unsigned int addr, unsigned int blocklen) +{ + /* This usually takes 100-4000ms, so wait in 100ms steps. */ + return spi_write_cmd(flash, 0xdc, addr, NULL, 0, 100 * 1000); +} + erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode) { switch(opcode){ @@ -548,10 +599,14 @@ return NULL; case 0x20: return &spi_block_erase_20; + case 0x21: + return &spi_block_erase_21; case 0x50: return &spi_block_erase_50; case 0x52: return &spi_block_erase_52; + case 0x5c: + return &spi_block_erase_5c; case 0x60: return &spi_block_erase_60; case 0x62: @@ -568,6 +623,8 @@ return &spi_block_erase_d8; case 0xdb: return &spi_block_erase_db; + case 0xdc: + return &spi_block_erase_dc; default: msg_cinfo("%s: unknown erase opcode (0x%02x). Please report " "this at flashrom(a)flashrom.org\n", __func__, opcode); @@ -799,3 +856,33 @@ msg_cerr("%s failed to disable AAI mode.\n", __func__); return SPI_GENERIC_ERROR; } + +/* Enter 4-bytes addressing mode (without sending WREN before) */ +int spi_enter_4ba_b7(struct flashctx *flash) +{ + const unsigned char cmd = JEDEC_ENTER_4_BYTE_ADDR_MODE; + + /* Switch to 4-bytes addressing mode */ + return spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL); +} + +/* Enter 4-bytes addressing mode with sending WREN before */ +int spi_enter_4ba_b7_we(struct flashctx *flash) +{ + return spi_simple_write_cmd(flash, JEDEC_ENTER_4_BYTE_ADDR_MODE, 0); +} + +/* Exit 4-bytes addressing mode (without sending WREN before) */ +int spi_exit_4ba_e9(struct flashctx *flash) +{ + const unsigned char cmd = JEDEC_EXIT_4_BYTE_ADDR_MODE; + + /* Switch to 3-bytes addressing mode */ + return spi_send_command(flash, sizeof(cmd), 0, &cmd, NULL); +} + +/* Exit 4-bytes addressing mode with sending WREN before */ +int spi_exit_4ba_e9_we(struct flashctx *flash) +{ + return spi_simple_write_cmd(flash, JEDEC_EXIT_4_BYTE_ADDR_MODE, 0); +} diff --git a/spi4ba.c b/spi4ba.c deleted file mode 100644 index d8ab6a8..0000000 --- a/spi4ba.c +++ /dev/null @@ -1,304 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2014 Boris Baykov - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * SPI chip driver functions for 4-bytes addressing - */ - -#include <string.h> -#include "flash.h" -#include "chipdrivers.h" -#include "spi.h" -#include "programmer.h" -#include "spi4ba.h" - -/* #define MSG_TRACE_4BA_FUNCS 1 */ - -#ifdef MSG_TRACE_4BA_FUNCS -#define msg_trace(...) print(MSG_DEBUG, __VA_ARGS__) -#else -#define msg_trace(...) -#endif - -/* Enter 4-bytes addressing mode (without sending WREN before) */ -int spi_enter_4ba_b7(struct flashctx *flash) -{ - const unsigned char cmd[JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE] = { JEDEC_ENTER_4_BYTE_ADDR_MODE }; - - msg_trace("-> %s\n", __func__); - - /* Switch to 4-bytes addressing mode */ - return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); -} - -/* Enter 4-bytes addressing mode with sending WREN before */ -int spi_enter_4ba_b7_we(struct flashctx *flash) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_ENTER_4_BYTE_ADDR_MODE }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s\n", __func__); - - /* Switch to 4-bytes addressing mode */ - result = spi_send_multicommand(flash, cmds); - if (result) - msg_cerr("%s failed during command execution\n", __func__); - return result; -} - -/* Exit 4-bytes addressing mode (without sending WREN before) */ -int spi_exit_4ba_e9(struct flashctx *flash) -{ - const unsigned char cmd[JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE] = { JEDEC_EXIT_4_BYTE_ADDR_MODE }; - - msg_trace("-> %s\n", __func__); - - /* Switch to 3-bytes addressing mode */ - return spi_send_command(flash, sizeof(cmd), 0, cmd, NULL); -} - -/* Exit 4-bytes addressing mode with sending WREN before */ -int spi_exit_4ba_e9_we(struct flashctx *flash) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_EXIT_4_BYTE_ADDR_MODE }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s\n", __func__); - - /* Switch to 3-bytes addressing mode */ - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution\n", __func__); - } - return result; -} - -/* Write Extended Address Register value */ -int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_WRITE_EXT_ADDR_REG_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_WRITE_EXT_ADDR_REG, - regdata - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (%02X)\n", __func__, regdata); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution\n", __func__); - return result; - } - return 0; -} - -/* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_SE_4BA (21h) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_block_erase_21_4ba_direct(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_SE_4BA_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_SE_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 15-800 ms, so wait in 10 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(10 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Erase 32 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_BE_5C_4BA (5Ch) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_5C_4BA_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_5C_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Erase 64 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_BE_DC_4BA (DCh) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_DC_4BA_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_DC_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} diff --git a/spi4ba.h b/spi4ba.h deleted file mode 100644 index a0316bc..0000000 --- a/spi4ba.h +++ /dev/null @@ -1,119 +0,0 @@ -/* - * This file is part of the flashrom project. - * - * Copyright (C) 2014 Boris Baykov - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -*/ - -/* - * JEDEC flash chips instructions for 4-bytes addressing - * SPI chip driver functions for 4-bytes addressing - */ - -#ifndef __SPI_4BA_H__ -#define __SPI_4BA_H__ 1 - -/* Enter 4-byte Address Mode */ -#define JEDEC_ENTER_4_BYTE_ADDR_MODE 0xB7 -#define JEDEC_ENTER_4_BYTE_ADDR_MODE_OUTSIZE 0x01 -#define JEDEC_ENTER_4_BYTE_ADDR_MODE_INSIZE 0x00 - -/* Exit 4-byte Address Mode */ -#define JEDEC_EXIT_4_BYTE_ADDR_MODE 0xE9 -#define JEDEC_EXIT_4_BYTE_ADDR_MODE_OUTSIZE 0x01 -#define JEDEC_EXIT_4_BYTE_ADDR_MODE_INSIZE 0x00 - -/* Write Extended Address Register */ -#define JEDEC_WRITE_EXT_ADDR_REG 0xC5 -#define JEDEC_WRITE_EXT_ADDR_REG_OUTSIZE 0x02 -#define JEDEC_WRITE_EXT_ADDR_REG_INSIZE 0x00 - -/* Read Extended Address Register */ -#define JEDEC_READ_EXT_ADDR_REG 0xC8 -#define JEDEC_READ_EXT_ADDR_REG_OUTSIZE 0x01 -#define JEDEC_READ_EXT_ADDR_REG_INSIZE 0x01 - -/* Read the memory with 4-byte address - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_READ_4BA 0x13 -#define JEDEC_READ_4BA_OUTSIZE 0x05 -/* JEDEC_READ_4BA_INSIZE : any length */ - -/* Write memory byte with 4-byte address - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_BYTE_PROGRAM_4BA 0x12 -#define JEDEC_BYTE_PROGRAM_4BA_OUTSIZE 0x06 -#define JEDEC_BYTE_PROGRAM_4BA_INSIZE 0x00 - -/* Sector Erase 0x21 (with 4-byte address), usually 4k size. - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_SE_4BA 0x21 -#define JEDEC_SE_4BA_OUTSIZE 0x05 -#define JEDEC_SE_4BA_INSIZE 0x00 - -/* Block Erase 0x5C (with 4-byte address), usually 32k size. - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_BE_5C_4BA 0x5C -#define JEDEC_BE_5C_4BA_OUTSIZE 0x05 -#define JEDEC_BE_5C_4BA_INSIZE 0x00 - -/* Block Erase 0xDC (with 4-byte address), usually 64k size. - From ANY mode (3-bytes or 4-bytes) it works with 4-byte address */ -#define JEDEC_BE_DC_4BA 0xdc -#define JEDEC_BE_DC_4BA_OUTSIZE 0x05 -#define JEDEC_BE_DC_4BA_INSIZE 0x00 - -/* enter 4-bytes addressing mode */ -int spi_enter_4ba_b7(struct flashctx *flash); -int spi_enter_4ba_b7_we(struct flashctx *flash); - -/* exit 4-bytes addressing mode */ -int spi_exit_4ba_e9(struct flashctx *flash); -int spi_exit_4ba_e9_we(struct flashctx *flash); - -/* read/write flash bytes in 4-bytes addressing mode */ -int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); - -/* erase flash bytes in 4-bytes addressing mode */ -int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen); - -/* read/write flash bytes from 3-bytes addressing mode using extended address register */ -int spi_byte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba_ereg(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); - -/* erase flash bytes from 3-bytes addressing mode using extended address register */ -int spi_block_erase_20_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_52_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_d8_4ba_ereg(struct flashctx *flash, unsigned int addr, unsigned int blocklen); - -/* read/write flash bytes with 4-bytes address from any mode (3-byte or 4-byte) */ -int spi_byte_program_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program_4ba_direct(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); -int spi_nbyte_read_4ba_direct(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); - -/* erase flash bytes with 4-bytes address from any mode (3-byte or 4-byte) */ -int spi_block_erase_21_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); -int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); - -int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata); - -#endif /* __SPI_4BA_H__ */ -- To view, visit https://review.coreboot.org/22024 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: If581e24347e45cbb27002ea99ffd70e334c110cf Gerrit-Change-Number: 22024 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

1 0

Change in flashrom[staging]: spi4ba: Drop now obsolete redundant functions
by Nico Huber (Code Review) 15 Oct '17

15 Oct '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22023 Change subject: spi4ba: Drop now obsolete redundant functions ...................................................................... spi4ba: Drop now obsolete redundant functions Change-Id: I1d04448fd1acbfc37b8e17288f497a4292dfd6d6 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M spi4ba.c 1 file changed, 0 insertions(+), 651 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/23/22023/1 diff --git a/spi4ba.c b/spi4ba.c index a44e067..d8ab6a8 100644 --- a/spi4ba.c +++ b/spi4ba.c @@ -121,246 +121,6 @@ return result; } -/* Program one flash byte from 4-bytes addressing mode */ -int spi_byte_program_4ba(struct flashctx *flash, unsigned int addr, uint8_t databyte) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE + 1, - .writearr = (const unsigned char[]){ - JEDEC_BYTE_PROGRAM, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff), - databyte - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X)\n", __func__, addr); - - result = spi_send_multicommand(flash, cmds); - if (result) - msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); - return result; -} - -/* Program flash bytes from 4-bytes addressing mode */ -int spi_nbyte_program_4ba(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len) -{ - int result; - unsigned char cmd[(JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1 + 256] = { - JEDEC_BYTE_PROGRAM, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr >> 0) & 0xff - }; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = (JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1 + len, - .writearr = cmd, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1); - - if (!len) { - msg_cerr("%s called for zero-length write\n", __func__); - return 1; - } - if (len > 256) { - msg_cerr("%s called for too long a write\n", __func__); - return 1; - } - - memcpy(&cmd[(JEDEC_BYTE_PROGRAM_OUTSIZE + 1) - 1], bytes, len); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; -} - -/* Read flash bytes from 4-bytes addressing mode */ -int spi_nbyte_read_4ba(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len) -{ - const unsigned char cmd[JEDEC_READ_OUTSIZE + 1] = { - JEDEC_READ, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr >> 0) & 0xff - }; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1); - - /* Send Read */ - return spi_send_command(flash, sizeof(cmd), len, cmd, bytes); -} - -/* Erase one sector of flash from 4-bytes addressing mode */ -int spi_block_erase_20_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_SE_OUTSIZE + 1, - .writearr = (const unsigned char[]){ - JEDEC_SE, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 15-800 ms, so wait in 10 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(10 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Erase one sector of flash from 4-bytes addressing mode */ -int spi_block_erase_52_4ba(struct flashctx *flash, unsigned int addr, unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_52_OUTSIZE + 1, - .writearr = (const unsigned char[]){ - JEDEC_BE_52, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Erase one sector of flash from 4-bytes addressing mode */ -int spi_block_erase_d8_4ba(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_D8_OUTSIZE + 1, - .writearr = (const unsigned char[]){ - JEDEC_BE_D8, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - /* Write Extended Address Register value */ int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata) { @@ -394,417 +154,6 @@ return result; } return 0; -} - -/* Assign required value of Extended Address Register. This function - keeps last value of the register and writes the register if the - value has to be changed only. */ -int set_extended_address_register(struct flashctx *flash, uint8_t data) -{ - static uint8_t ext_addr_reg_state; /* memory for last register state */ - static int ext_addr_reg_state_valid = 0; - int result; - - if (ext_addr_reg_state_valid == 0 || data != ext_addr_reg_state) { - result = spi_write_extended_address_register(flash, data); - if (result) { - ext_addr_reg_state_valid = 0; - return result; - } - ext_addr_reg_state = data; - ext_addr_reg_state_valid = 1; - } - return 0; -} - -/* Program one flash byte using Extended Address Register - from 3-bytes addressing mode */ -int spi_byte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, - uint8_t databyte) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BYTE_PROGRAM, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff), - databyte - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X)\n", __func__, addr); - - result = set_extended_address_register(flash, (addr >> 24) & 0xff); - if (result) - return result; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; -} - -/* Program flash bytes using Extended Address Register - from 3-bytes addressing mode */ -int spi_nbyte_program_4ba_ereg(struct flashctx *flash, unsigned int addr, - const uint8_t *bytes, unsigned int len) -{ - int result; - unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = { - JEDEC_BYTE_PROGRAM, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr >> 0) & 0xff - }; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + len, - .writearr = cmd, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1); - - if (!len) { - msg_cerr("%s called for zero-length write\n", __func__); - return 1; - } - if (len > 256) { - msg_cerr("%s called for too long a write\n", __func__); - return 1; - } - - memcpy(&cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1], bytes, len); - - result = set_extended_address_register(flash, (addr >> 24) & 0xff); - if (result) - return result; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; -} - -/* Read flash bytes using Extended Address Register - from 3-bytes addressing mode */ -int spi_nbyte_read_4ba_ereg(struct flashctx *flash, unsigned int addr, - uint8_t *bytes, unsigned int len) -{ - int result; - const unsigned char cmd[JEDEC_READ_OUTSIZE] = { - JEDEC_READ, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr >> 0) & 0xff - }; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1); - - result = set_extended_address_register(flash, (addr >> 24) & 0xff); - if (result) - return result; - - /* Send Read */ - return spi_send_command(flash, sizeof(cmd), len, cmd, bytes); -} - -/* Erases 4 KB of flash using Extended Address Register - from 3-bytes addressing mode */ -int spi_block_erase_20_4ba_ereg(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_SE_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_SE, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = set_extended_address_register(flash, (addr >> 24) & 0xff); - if (result) - return result; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 15-800 ms, so wait in 10 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(10 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Erases 32 KB of flash using Extended Address Register - from 3-bytes addressing mode */ -int spi_block_erase_52_4ba_ereg(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_52_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_52, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = set_extended_address_register(flash, (addr >> 24) & 0xff); - if (result) - return result; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Erases 64 KB of flash using Extended Address Register - from 3-bytes addressing mode */ -int spi_block_erase_d8_4ba_ereg(struct flashctx *flash, unsigned int addr, - unsigned int blocklen) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_D8_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_D8, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + blocklen - 1); - - result = set_extended_address_register(flash, (addr >> 24) & 0xff); - if (result) - return result; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; -} - -/* Program one flash byte with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_BYTE_PROGRAM_4BA (12h) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_byte_program_4ba_direct(struct flashctx *flash, unsigned int addr, - uint8_t databyte) -{ - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_4BA_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BYTE_PROGRAM_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff), - databyte - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X)\n", __func__, addr); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; -} - -/* Program flash bytes with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_BYTE_PROGRAM_4BA (12h) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_nbyte_program_4ba_direct(struct flashctx *flash, unsigned int addr, - const uint8_t *bytes, unsigned int len) -{ - int result; - unsigned char cmd[JEDEC_BYTE_PROGRAM_4BA_OUTSIZE - 1 + 256] = { - JEDEC_BYTE_PROGRAM_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr >> 0) & 0xff - }; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_4BA_OUTSIZE - 1 + len, - .writearr = cmd, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1); - - if (!len) { - msg_cerr("%s called for zero-length write\n", __func__); - return 1; - } - if (len > 256) { - msg_cerr("%s called for too long a write\n", __func__); - return 1; - } - - memcpy(&cmd[JEDEC_BYTE_PROGRAM_4BA_OUTSIZE - 1], bytes, len); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; -} - -/* Read flash bytes with 4-bytes address from ANY mode (3-bytes or 4-bytes) - JEDEC_READ_4BA (13h) instruction is new for 4-bytes addressing flash chips. - The presence of this instruction for an exact chip should be checked - by its datasheet or from SFDP 4-Bytes Address Instruction Table (JESD216B). */ -int spi_nbyte_read_4ba_direct(struct flashctx *flash, unsigned int addr, - uint8_t *bytes, unsigned int len) -{ - const unsigned char cmd[JEDEC_READ_4BA_OUTSIZE] = { - JEDEC_READ_4BA, - (addr >> 24) & 0xff, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr >> 0) & 0xff - }; - - msg_trace("-> %s (0x%08X-0x%08X)\n", __func__, addr, addr + len - 1); - - /* Send Read */ - return spi_send_command(flash, sizeof(cmd), len, cmd, bytes); } /* Erase 4 KB of flash with 4-bytes address from ANY mode (3-bytes or 4-bytes) -- To view, visit https://review.coreboot.org/22023 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: I1d04448fd1acbfc37b8e17288f497a4292dfd6d6 Gerrit-Change-Number: 22023 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[staging]: spi25: Remove now obsolete `four_bytes_addr_funcs` path
by Nico Huber (Code Review) 15 Oct '17

15 Oct '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22022 Change subject: spi25: Remove now obsolete `four_bytes_addr_funcs` path ...................................................................... spi25: Remove now obsolete `four_bytes_addr_funcs` path Change-Id: Idb7c576cb159630da2268813388b497cb5f46b43 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M flash.h M flashchips.c M flashrom.c M spi25.c 4 files changed, 10 insertions(+), 44 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/22/22022/1 diff --git a/flash.h b/flash.h index 5538955..973fd47 100644 --- a/flash.h +++ b/flash.h @@ -168,14 +168,6 @@ unsigned int page_size; int feature_bits; - /* set of function pointers to use in 4-bytes addressing mode */ - struct four_bytes_addr_funcs_set { - int (*set_4ba) (struct flashctx *flash); - int (*read_nbyte) (struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); - int (*program_byte) (struct flashctx *flash, unsigned int addr, const uint8_t databyte); - int (*program_nbyte) (struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); - } four_bytes_addr_funcs; - /* Indicate how well flashrom supports different operations of this flash chip. */ struct tested { enum test_state probe; @@ -212,6 +204,7 @@ int (*unlock) (struct flashctx *flash); int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len); + int (*set_4ba) (struct flashctx *flash); struct voltage { uint16_t min; uint16_t max; diff --git a/flashchips.c b/flashchips.c index 9848e5e..a7fdf1c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9753,12 +9753,6 @@ /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ | FEATURE_4BA_WRITE, - .four_bytes_addr_funcs = - { - .read_nbyte = spi_nbyte_read_4ba_direct, - .program_byte = spi_byte_program_4ba_direct, - .program_nbyte = spi_nbyte_program_4ba_direct - }, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -9792,12 +9786,6 @@ /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ | FEATURE_4BA_WRITE, - .four_bytes_addr_funcs = - { - .read_nbyte = spi_nbyte_read_4ba_direct, - .program_byte = spi_byte_program_4ba_direct, - .program_nbyte = spi_nbyte_program_4ba_direct - }, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -14676,13 +14664,6 @@ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ, - .four_bytes_addr_funcs = - { - .set_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ - .read_nbyte = spi_nbyte_read_4ba_direct, /* read directly from any mode, no need to enter 4ba */ - .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ - .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ - }, .tested = TEST_OK_PREW, .probe = probe_spi_rdid, .probe_timing = TIMING_ZERO, @@ -14690,13 +14671,13 @@ { { .eraseblocks = { {4 * 1024, 8192} }, - .block_erase = spi_block_erase_20_4ba, /* erases 4k from 4-bytes addressing mode */ + .block_erase = spi_block_erase_20, }, { .eraseblocks = { {32 * 1024, 1024} }, - .block_erase = spi_block_erase_52_4ba, /* erases 32k from 4-bytes addressing mode */ + .block_erase = spi_block_erase_52, }, { .eraseblocks = { {64 * 1024, 512} }, - .block_erase = spi_block_erase_d8_4ba, /* erases 64k from 4-bytes addressing mode */ + .block_erase = spi_block_erase_d8, }, { .eraseblocks = { {32 * 1024 * 1024, 1} }, .block_erase = spi_block_erase_60, @@ -14709,6 +14690,7 @@ .unlock = spi_disable_blockprotect, .write = spi_chip_write_256, .read = spi_chip_read, + .set_4ba = spi_enter_4ba_b7_we, .voltage = {2700, 3600}, }, diff --git a/flashrom.c b/flashrom.c index 62991d5..9b4b865 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2224,9 +2224,8 @@ flash->chip->unlock(flash); /* Enable/disable 4-byte addressing mode if flash chip supports it */ - if ((flash->chip->feature_bits & FEATURE_4BA_SUPPORT) && - flash->chip->four_bytes_addr_funcs.set_4ba) { - if (flash->chip->four_bytes_addr_funcs.set_4ba(flash)) { + if ((flash->chip->feature_bits & FEATURE_4BA_SUPPORT) && flash->chip->set_4ba) { + if (flash->chip->set_4ba(flash)) { msg_cerr("Enabling/disabling 4-byte addressing mode failed!\n"); return 1; } diff --git a/spi25.c b/spi25.c index dcab177..98b314d 100644 --- a/spi25.c +++ b/spi25.c @@ -631,10 +631,7 @@ lenhere = min(start + len, (i + 1) * area_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { toread = min(chunksize, lenhere - j); - rc = (flash->chip->feature_bits & FEATURE_4BA_SUPPORT) == 0 - ? spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread) - : flash->chip->four_bytes_addr_funcs.read_nbyte(flash, starthere + j, - buf + starthere - start + j, toread); + rc = spi_nbyte_read(flash, starthere + j, buf + starthere - start + j, toread); if (rc) break; } @@ -679,10 +676,7 @@ lenhere = min(start + len, (i + 1) * page_size) - starthere; for (j = 0; j < lenhere; j += chunksize) { towrite = min(chunksize, lenhere - j); - rc = (flash->chip->feature_bits & FEATURE_4BA_SUPPORT) == 0 - ? spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite) - : flash->chip->four_bytes_addr_funcs.program_nbyte(flash, starthere + j, - buf + starthere - start + j, towrite); + rc = spi_nbyte_program(flash, starthere + j, buf + starthere - start + j, towrite); if (rc) break; while (spi_read_status_register(flash) & SPI_SR_WIP) @@ -708,9 +702,7 @@ int result = 0; for (i = start; i < start + len; i++) { - result = (flash->chip->feature_bits & FEATURE_4BA_SUPPORT) == 0 - ? spi_nbyte_program(flash, i, buf + i - start, 1) - : flash->chip->four_bytes_addr_funcs.program_byte(flash, i, buf[i - start]); + result = spi_nbyte_program(flash, i, buf + i - start, 1); if (result) return 1; while (spi_read_status_register(flash) & SPI_SR_WIP) -- To view, visit https://review.coreboot.org/22022 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: Idb7c576cb159630da2268813388b497cb5f46b43 Gerrit-Change-Number: 22022 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[staging]: spi25: Enable direct 4BA read and write using feature bits
by Nico Huber (Code Review) 15 Oct '17

15 Oct '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22021 Change subject: spi25: Enable direct 4BA read and write using feature bits ...................................................................... spi25: Enable direct 4BA read and write using feature bits Change-Id: I2f6817ca198bf923671a7aa67e956e5477d71848 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M flash.h M flashchips.c M spi25.c 3 files changed, 15 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/21/22021/1 diff --git a/flash.h b/flash.h index a3e7fd4..5538955 100644 --- a/flash.h +++ b/flash.h @@ -121,6 +121,8 @@ #define FEATURE_QPI (1 << 9) #define FEATURE_4BA_SUPPORT (1 << 10) #define FEATURE_4BA_EXT_ADDR (1 << 11) +#define FEATURE_4BA_READ (1 << 12) +#define FEATURE_4BA_WRITE (1 << 13) enum test_state { OK = 0, diff --git a/flashchips.c b/flashchips.c index 742cc6e..9848e5e 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9752,7 +9752,7 @@ .page_size = 256, /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ | FEATURE_4BA_WRITE, .four_bytes_addr_funcs = { .read_nbyte = spi_nbyte_read_4ba_direct, @@ -9791,7 +9791,7 @@ .page_size = 256, /* supports SFDP */ /* OTP: 64B total; read 0x4B, write 0x42 */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ | FEATURE_4BA_WRITE, .four_bytes_addr_funcs = { .read_nbyte = spi_nbyte_read_4ba_direct, @@ -14675,7 +14675,7 @@ /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_READ, .four_bytes_addr_funcs = { .set_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ diff --git a/spi25.c b/spi25.c index 052c6f3..dcab177 100644 --- a/spi25.c +++ b/spi25.c @@ -577,13 +577,21 @@ static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len) { - return spi_write_cmd(flash, JEDEC_BYTE_PROGRAM, addr, bytes, len, 10); + const uint8_t op = + flash->chip->feature_bits & FEATURE_4BA_WRITE + ? JEDEC_BYTE_PROGRAM_4BA + : JEDEC_BYTE_PROGRAM; + return spi_write_cmd(flash, op, addr, bytes, len, 10); } int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes, unsigned int len) { - uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN] = { JEDEC_READ, }; + uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN] = { + flash->chip->feature_bits & FEATURE_4BA_READ + ? JEDEC_READ_4BA + : JEDEC_READ, + }; const int addr_len = spi_prepare_address(flash, cmd, address); if (addr_len < 0) -- To view, visit https://review.coreboot.org/22021 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: I2f6817ca198bf923671a7aa67e956e5477d71848 Gerrit-Change-Number: 22021 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[staging]: spi25: Add native 4BA support
by Nico Huber (Code Review) 15 Oct '17

15 Oct '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22020 Change subject: spi25: Add native 4BA support ...................................................................... spi25: Add native 4BA support Allow 4-byte adresses, cache the upper most byte in flashctx if the chip uses an extended address register. Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M flash.h M flashrom.c M spi25.c M spi4ba.h 4 files changed, 30 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/20/22020/1 diff --git a/flash.h b/flash.h index 52303f1..a3e7fd4 100644 --- a/flash.h +++ b/flash.h @@ -120,6 +120,7 @@ #define FEATURE_OTP (1 << 8) #define FEATURE_QPI (1 << 9) #define FEATURE_4BA_SUPPORT (1 << 10) +#define FEATURE_4BA_EXT_ADDR (1 << 11) enum test_state { OK = 0, @@ -236,6 +237,7 @@ bool verify_after_write; bool verify_whole_chip; } flags; + int address_high_byte; }; /* Timing used in probe routines. ZERO is -2 to differentiate between an unset diff --git a/flashrom.c b/flashrom.c index 4f17382..62991d5 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2232,6 +2232,8 @@ } } + flash->address_high_byte = -1; + return 0; } diff --git a/spi25.c b/spi25.c index f8ad692..052c6f3 100644 --- a/spi25.c +++ b/spi25.c @@ -355,14 +355,34 @@ return result ? result : status; } +static int spi_set_extended_address(struct flashctx *const flash, const uint8_t addr_high) +{ + if (flash->address_high_byte != addr_high && + spi_write_extended_address_register(flash, addr_high)) + return -1; + flash->address_high_byte = addr_high; + return 0; +} + static int spi_prepare_address(struct flashctx *const flash, uint8_t cmd_buf[], const unsigned int addr) { - /* TODO: extend for 4BA */ - cmd_buf[1] = (addr >> 16) & 0xff; - cmd_buf[2] = (addr >> 8) & 0xff; - cmd_buf[3] = (addr >> 0) & 0xff; - return 3; + if (flash->chip->feature_bits & FEATURE_4BA_SUPPORT && + !(flash->chip->feature_bits & FEATURE_4BA_EXT_ADDR)) { + cmd_buf[1] = (addr >> 24) & 0xff; + cmd_buf[2] = (addr >> 16) & 0xff; + cmd_buf[3] = (addr >> 8) & 0xff; + cmd_buf[4] = (addr >> 0) & 0xff; + return 4; + } else { + if (flash->chip->feature_bits & FEATURE_4BA_EXT_ADDR && + spi_set_extended_address(flash, addr >> 24)) + return -1; + cmd_buf[1] = (addr >> 16) & 0xff; + cmd_buf[2] = (addr >> 8) & 0xff; + cmd_buf[3] = (addr >> 0) & 0xff; + return 3; + } } static int spi_write_cmd(struct flashctx *const flash, diff --git a/spi4ba.h b/spi4ba.h index 8a01792..a0316bc 100644 --- a/spi4ba.h +++ b/spi4ba.h @@ -114,5 +114,6 @@ int spi_block_erase_5c_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); int spi_block_erase_dc_4ba_direct(struct flashctx *flash, unsigned int addr, unsigned int blocklen); +int spi_write_extended_address_register(struct flashctx *flash, uint8_t regdata); #endif /* __SPI_4BA_H__ */ -- To view, visit https://review.coreboot.org/22020 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: I644600beaab9a571b97b67f7516abe571d3460c1 Gerrit-Change-Number: 22020 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

1 0

Change in flashrom[staging]: spi25: Use common code for nbyte read/write and erase
by Nico Huber (Code Review) 15 Oct '17

15 Oct '17

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/22019 Change subject: spi25: Use common code for nbyte read/write and erase ...................................................................... spi25: Use common code for nbyte read/write and erase Introduce spi_prepare_address() and spi_write_command() and use them in byte_program, nbyte_program, nbyte_read and erase procedures. The former abstracts over the address part of a SPI command to make it extensible for 4-byte adressing. spi_write_command() implements a simple WREN + write operation with address. It provides a common path to reduce overall redundancy. Also, reduce the polling delay in spi_block_erase_c4() from 500s to 500ms as the comment suggests. Change-Id: Ibc1ae48acbfbd427a30bcd64bdc080dc3dc20503 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M chipdrivers.h M spi.h M spi25.c 3 files changed, 92 insertions(+), 429 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/19/22019/1 diff --git a/chipdrivers.h b/chipdrivers.h index 16a75a9..12fc5a3 100644 --- a/chipdrivers.h +++ b/chipdrivers.h @@ -55,8 +55,6 @@ int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen); erasefunc_t *spi_get_erasefn_from_opcode(uint8_t opcode); int spi_chip_write_1(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len); -int spi_byte_program(struct flashctx *flash, unsigned int addr, uint8_t databyte); -int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); int spi_nbyte_read(struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int spi_read_chunked(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); int spi_write_chunked(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len, unsigned int chunksize); diff --git a/spi.h b/spi.h index de5b3be..41b0245 100644 --- a/spi.h +++ b/spi.h @@ -24,6 +24,8 @@ * Contains the generic SPI headers */ +#define JEDEC_MAX_ADDR_LEN 0x04 + /* Read Electronic ID */ #define JEDEC_RDID 0x9f #define JEDEC_RDID_OUTSIZE 0x01 diff --git a/spi25.c b/spi25.c index 4f8d497..f8ad692 100644 --- a/spi25.c +++ b/spi25.c @@ -323,6 +323,16 @@ return 0; } +static int spi_write_status(struct flashctx *const flash, const unsigned int poll_delay) +{ + /* FIXME: We can't tell if spi_read_status_register() failed. */ + /* FIXME: We don't time out. */ + while (spi_read_status_register(flash) & SPI_SR_WIP) + programmer_delay(poll_delay); + /* FIXME: Check the status register for errors. */ + return 0; +} + static int spi_simple_write_cmd(struct flashctx *const flash, const uint8_t op, const unsigned int poll_delay) { struct spi_command cmds[] = { @@ -340,13 +350,57 @@ if (result) msg_cerr("%s failed during command execution\n", __func__); - /* FIXME: We can't tell if spi_read_status_register() failed. */ - /* FIXME: We don't time out. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(poll_delay); - /* FIXME: Check the status register for errors. */ + const int status = spi_write_status(flash, poll_delay); - return result; + return result ? result : status; +} + +static int spi_prepare_address(struct flashctx *const flash, + uint8_t cmd_buf[], const unsigned int addr) +{ + /* TODO: extend for 4BA */ + cmd_buf[1] = (addr >> 16) & 0xff; + cmd_buf[2] = (addr >> 8) & 0xff; + cmd_buf[3] = (addr >> 0) & 0xff; + return 3; +} + +static int spi_write_cmd(struct flashctx *const flash, + const uint8_t op, const unsigned int addr, + const uint8_t *const out_bytes, const size_t out_len, + const unsigned int poll_delay) +{ + uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN + 256]; + struct spi_command cmds[] = { + { + .writecnt = 1, + .writearr = (const unsigned char[]){ JEDEC_WREN }, + }, { + .writearr = cmd, + }, + NULL_SPI_CMD, + }; + + cmd[0] = op; + const int addr_len = spi_prepare_address(flash, cmd, addr); + if (addr_len < 0) + return 1; + + if (1 + addr_len + out_len > sizeof(cmd)) { + msg_cerr("%s called for too long a write\n", __func__); + return 1; + } + + memcpy(cmd + 1 + addr_len, out_bytes, out_len); + cmds[1].writecnt = 1 + addr_len + out_len; + + const int result = spi_send_multicommand(flash, cmds); + if (result) + msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); + + const int status = spi_write_status(flash, poll_delay); + + return result ? result : status; } int spi_chip_erase_60(struct flashctx *flash) @@ -370,43 +424,8 @@ int spi_block_erase_52(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_52_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_52, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; + /* This usually takes 100-4000ms, so wait in 100ms steps. */ + return spi_write_cmd(flash, 0x52, addr, NULL, 0, 100 * 1000); } /* Block size is usually @@ -414,42 +433,8 @@ */ int spi_block_erase_c4(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_C4_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_C4, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 240-480 s, so wait in 500 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(500 * 1000 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; + /* This usually takes 240-480s, so wait in 500ms steps. */ + return spi_write_cmd(flash, 0xc4, addr, NULL, 0, 500 * 1000); } /* Block size is usually @@ -460,43 +445,8 @@ int spi_block_erase_d8(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_D8_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_D8, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; + /* This usually takes 100-4000ms, so wait in 100ms steps. */ + return spi_write_cmd(flash, 0xd8, addr, NULL, 0, 100 * 1000); } /* Block size is usually @@ -505,207 +455,36 @@ int spi_block_erase_d7(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BE_D7_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_D7, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 100-4000 ms, so wait in 100 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(100 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; + /* This usually takes 100-4000ms, so wait in 100ms steps. */ + return spi_write_cmd(flash, 0xd7, addr, NULL, 0, 100 * 1000); } /* Page erase (usually 256B blocks) */ int spi_block_erase_db(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_PE_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_PE, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - } }; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); - return result; - } - - /* Wait until the Write-In-Progress bit is cleared. - * This takes up to 20 ms usually (on worn out devices up to the 0.5s range), so wait in 1 ms steps. */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(1 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; + /* This takes up to 20ms usually (on worn out devices + up to the 0.5s range), so wait in 1ms steps. */ + return spi_write_cmd(flash, 0xdb, addr, NULL, 0, 1 * 1000); } /* Sector size is usually 4k, though Macronix eliteflash has 64k */ int spi_block_erase_20(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_SE_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_SE, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 15-800 ms, so wait in 10 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(10 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; + /* This usually takes 15-800ms, so wait in 10ms steps. */ + return spi_write_cmd(flash, 0x20, addr, NULL, 0, 10 * 1000); } int spi_block_erase_50(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - int result; - struct spi_command cmds[] = { - { -/* .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { */ - .writecnt = JEDEC_BE_50_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_50, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 10 ms, so wait in 1 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(1 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; + /* This usually takes 10ms, so wait in 1ms steps. */ + return spi_write_cmd(flash, 0x50, addr, NULL, 0, 1 * 1000); } int spi_block_erase_81(struct flashctx *flash, unsigned int addr, unsigned int blocklen) { - int result; - struct spi_command cmds[] = { - { -/* .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { */ - .writecnt = JEDEC_BE_81_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BE_81, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff) - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", __func__, addr); - return result; - } - /* Wait until the Write-In-Progress bit is cleared. - * This usually takes 8 ms, so wait in 1 ms steps. - */ - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(1 * 1000); - /* FIXME: Check the status register for errors. */ - return 0; + /* This usually takes 8ms, so wait in 1ms steps. */ + return spi_write_cmd(flash, 0x81, addr, NULL, 0, 1 * 1000); } int spi_block_erase_60(struct flashctx *flash, unsigned int addr, @@ -776,101 +555,22 @@ } } -int spi_byte_program(struct flashctx *flash, unsigned int addr, - uint8_t databyte) +static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len) { - int result; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_BYTE_PROGRAM, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr & 0xff), - databyte - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; -} - -int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len) -{ - int result; - /* FIXME: Switch to malloc based on len unless that kills speed. */ - unsigned char cmd[JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + 256] = { - JEDEC_BYTE_PROGRAM, - (addr >> 16) & 0xff, - (addr >> 8) & 0xff, - (addr >> 0) & 0xff, - }; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_BYTE_PROGRAM_OUTSIZE - 1 + len, - .writearr = cmd, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; - - if (!len) { - msg_cerr("%s called for zero-length write\n", __func__); - return 1; - } - if (len > 256) { - msg_cerr("%s called for too long a write\n", __func__); - return 1; - } - - memcpy(&cmd[4], bytes, len); - - result = spi_send_multicommand(flash, cmds); - if (result) { - msg_cerr("%s failed during command execution at address 0x%x\n", - __func__, addr); - } - return result; + return spi_write_cmd(flash, JEDEC_BYTE_PROGRAM, addr, bytes, len, 10); } int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes, unsigned int len) { - const unsigned char cmd[JEDEC_READ_OUTSIZE] = { - JEDEC_READ, - (address >> 16) & 0xff, - (address >> 8) & 0xff, - (address >> 0) & 0xff, - }; + uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN] = { JEDEC_READ, }; + + const int addr_len = spi_prepare_address(flash, cmd, address); + if (addr_len < 0) + return 1; /* Send Read */ - return spi_send_command(flash, sizeof(cmd), len, cmd, bytes); + return spi_send_command(flash, 1 + addr_len, len, cmd, bytes); } /* @@ -981,7 +681,7 @@ for (i = start; i < start + len; i++) { result = (flash->chip->feature_bits & FEATURE_4BA_SUPPORT) == 0 - ? spi_byte_program(flash, i, buf[i - start]) + ? spi_nbyte_program(flash, i, buf + i - start, 1) : flash->chip->four_bytes_addr_funcs.program_byte(flash, i, buf[i - start]); if (result) return 1; @@ -999,30 +699,6 @@ unsigned char cmd[JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE] = { JEDEC_AAI_WORD_PROGRAM, }; - struct spi_command cmds[] = { - { - .writecnt = JEDEC_WREN_OUTSIZE, - .writearr = (const unsigned char[]){ JEDEC_WREN }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = JEDEC_AAI_WORD_PROGRAM_OUTSIZE, - .writearr = (const unsigned char[]){ - JEDEC_AAI_WORD_PROGRAM, - (start >> 16) & 0xff, - (start >> 8) & 0xff, - (start & 0xff), - buf[0], - buf[1] - }, - .readcnt = 0, - .readarr = NULL, - }, { - .writecnt = 0, - .writearr = NULL, - .readcnt = 0, - .readarr = NULL, - }}; switch (flash->mst->spi.type) { #if CONFIG_INTERNAL == 1 @@ -1050,14 +726,6 @@ if (spi_chip_write_1(flash, buf, start, start % 2)) return SPI_GENERIC_ERROR; pos += start % 2; - cmds[1].writearr = (const unsigned char[]){ - JEDEC_AAI_WORD_PROGRAM, - (pos >> 16) & 0xff, - (pos >> 8) & 0xff, - (pos & 0xff), - buf[pos - start], - buf[pos - start + 1] - }; /* Do not return an error for now. */ //return SPI_GENERIC_ERROR; } @@ -1069,14 +737,9 @@ //return SPI_GENERIC_ERROR; } - - result = spi_send_multicommand(flash, cmds); - if (result != 0) { - msg_cerr("%s failed during start command execution: %d\n", __func__, result); + result = spi_write_cmd(flash, JEDEC_AAI_WORD_PROGRAM, start, buf + pos - start, 2, 10); + if (result) goto bailout; - } - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(10); /* We already wrote 2 bytes in the multicommand step. */ pos += 2; @@ -1090,8 +753,8 @@ msg_cerr("%s failed during followup AAI command execution: %d\n", __func__, result); goto bailout; } - while (spi_read_status_register(flash) & SPI_SR_WIP) - programmer_delay(10); + if (spi_write_status(flash, 10)) + goto bailout; } /* Use WRDI to exit AAI mode. This needs to be done before issuing any other non-AAI command. */ -- To view, visit https://review.coreboot.org/22019 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: newchange Gerrit-Change-Id: Ibc1ae48acbfbd427a30bcd64bdc080dc3dc20503 Gerrit-Change-Number: 22019 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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