October 2017 - flashrom-gerrit

Change in flashrom[staging]: Fix standalone ich_descriptor_tool compilation with MinGW and DJGPP
by Nico Huber (Code Review) Oct. 15, 2017

Oct. 15, 2017

Nico Huber has posted comments on this change. ( https://review.coreboot.org/21838 ) Change subject: Fix standalone ich_descriptor_tool compilation with MinGW and DJGPP ...................................................................... Patch Set 1: Code-Review+2 (1 comment) https://review.coreboot.org/#/c/21838/1/util/ich_descriptors_tool/Makefile File util/ich_descriptors_tool/Makefile: https://review.coreboot.org/#/c/21838/1/util/ich_descriptors_tool/Makefile@… PS1, Line 25: override TARGET_OS := $(shell $(CC) $(CPPFLAGS) -E $(SHAREDSRCDIR)/os.h | grep -v '^\#' | grep '"' | cut -f 2 -d'"') this line is a little long, though -- To view, visit https://review.coreboot.org/21838 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Id146f5ba06a0e510397c6f32a2bd7c819a405a25 Gerrit-Change-Number: 21838 Gerrit-PatchSet: 1 Gerrit-Owner: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 14:45:32 +0000 Gerrit-HasComments: Yes

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Change in flashrom[staging]: Fix serprog on FreeBSD
by Nico Huber (Code Review) Oct. 15, 2017

Oct. 15, 2017

Nico Huber has posted comments on this change. ( https://review.coreboot.org/21919 ) Change subject: Fix serprog on FreeBSD ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/21919 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I7aa6a283d523c544d9b8923cd4c622bf08c0fb3f Gerrit-Change-Number: 21919 Gerrit-PatchSet: 1 Gerrit-Owner: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 14:40:09 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: Fix ID of ST M25P05
by build bot (Jenkins) (Code Review) Oct. 15, 2017

Oct. 15, 2017

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21920 ) Change subject: Fix ID of ST M25P05 ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/705/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/791/ : SUCCESS -- To view, visit https://review.coreboot.org/21920 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Idc75f8cb98e7ef0c47c4527cedcc4da3723bd779 Gerrit-Change-Number: 21920 Gerrit-PatchSet: 2 Gerrit-Owner: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 14:18:04 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: Fix ID of ST M25P05
by Nico Huber (Code Review) Oct. 15, 2017

Oct. 15, 2017

Nico Huber has posted comments on this change. ( https://review.coreboot.org/21920 ) Change subject: Fix ID of ST M25P05 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/21920 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: Idc75f8cb98e7ef0c47c4527cedcc4da3723bd779 Gerrit-Change-Number: 21920 Gerrit-PatchSet: 1 Gerrit-Owner: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 14:17:42 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: serial: Support custom baud rates on linux
by Nico Huber (Code Review) Oct. 15, 2017

Oct. 15, 2017

Nico Huber has posted comments on this change. ( https://review.coreboot.org/20224 ) Change subject: serial: Support custom baud rates on linux ...................................................................... Patch Set 5: > Our antique centos has some hiccups with this one... > http://buildbot.flashrom.org/buildresults/flashrom-000784-UDp/centos-4-amd6… I guess this means it would just work if the kernel headers were installed. As this is usually the case, I'll submit this if there are no objections. We could add a Makefile test for the headers, ofc, for a better error message. -- To view, visit https://review.coreboot.org/20224 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I2a20f9182cb85e7bce5d6654a2caf20e6202b195 Gerrit-Change-Number: 20224 Gerrit-PatchSet: 5 Gerrit-Owner: Urja Rannikko <urjaman(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 14:16:42 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: serial: Support custom baud rates on linux
by build bot (Jenkins) (Code Review) Oct. 15, 2017

Oct. 15, 2017

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20224 ) Change subject: serial: Support custom baud rates on linux ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/flashrom_gerrit/704/ : SUCCESS https://qa.coreboot.org/job/flashrom-customrules/790/ : SUCCESS -- To view, visit https://review.coreboot.org/20224 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: comment Gerrit-Change-Id: I2a20f9182cb85e7bce5d6654a2caf20e6202b195 Gerrit-Change-Number: 20224 Gerrit-PatchSet: 5 Gerrit-Owner: Urja Rannikko <urjaman(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Oct 2017 14:11:54 +0000 Gerrit-HasComments: No

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Change in flashrom[staging]: Initial MX66L51235F support
by Nico Huber (Code Review) Oct. 15, 2017

Oct. 15, 2017

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/19856 ) Change subject: Initial MX66L51235F support ...................................................................... Initial MX66L51235F support Change-Id: I94bee2832469d2df399a09e2f535a107edaec3e7 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> Reviewed-on: https://review.coreboot.org/19856 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> --- M flashchips.c M flashchips.h 2 files changed, 48 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index 294fae1..a1ad445 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8092,6 +8092,53 @@ { .vendor = "Macronix", + .name = "MX66L51235F", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX66L51235F, + .total_size = 65536, + .page_size = 256, + /* OTP: 512B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .set_4ba = spi_enter_4ba_b7, /* enter 4-bytes addressing mode by CMD B7 */ + .read_nbyte = spi_nbyte_read_4ba, /* read from 4-bytes addressing mode */ + .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ + .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_20_4ba, + }, { + .eraseblocks = { {32 * 1024, 2048} }, + .block_erase = spi_block_erase_52_4ba, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_d8_4ba, + }, { + .eraseblocks = { {64 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {64 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: security register and SBLK/SBULK; MX25L12835F: configuration register */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", .name = "MX25U1635E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, diff --git a/flashchips.h b/flashchips.h index 28a155d..bff0c98 100644 --- a/flashchips.h +++ b/flashchips.h @@ -482,6 +482,7 @@ #define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */ #define MACRONIX_MX25L1635D 0x2415 #define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */ +#define MACRONIX_MX66L51235F 0x201a /* MX66L51235F */ #define MACRONIX_MX25U1635E 0x2535 #define MACRONIX_MX25U3235E 0x2536 /* Same as MX25U6435F */ #define MACRONIX_MX25U6435E 0x2537 /* Same as MX25U6435F */ -- To view, visit https://review.coreboot.org/19856 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: merged Gerrit-Change-Id: I94bee2832469d2df399a09e2f535a107edaec3e7 Gerrit-Change-Number: 19856 Gerrit-PatchSet: 4 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[staging]: Initial MX25L25635F support
by Nico Huber (Code Review) Oct. 15, 2017

Oct. 15, 2017

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/19855 ) Change subject: Initial MX25L25635F support ...................................................................... Initial MX25L25635F support Change-Id: I292e12d92cdf3961b8d47492a1d5679ff1ea21ce Signed-off-by: Timothy Pearson <tpearson(a)raptorengineering.com> Reviewed-on: https://review.coreboot.org/19855 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> --- M flashchips.c 1 file changed, 47 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved diff --git a/flashchips.c b/flashchips.c index 742cc6e..294fae1 100644 --- a/flashchips.c +++ b/flashchips.c @@ -8045,6 +8045,53 @@ { .vendor = "Macronix", + .name = "MX25L25635F/MX25L25645E/MX25L25665E", + .bustype = BUS_SPI, + .manufacture_id = MACRONIX_ID, + .model_id = MACRONIX_MX25L25635F, + .total_size = 32768, + .page_size = 256, + /* OTP: 512B total; enter 0xB1, exit 0xC1 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .set_4ba = spi_enter_4ba_b7, /* enter 4-bytes addressing mode by CMD B7 */ + .read_nbyte = spi_nbyte_read_4ba, /* read from 4-bytes addressing mode */ + .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ + .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_20_4ba, + }, { + .eraseblocks = { {32 * 1024, 1024} }, + .block_erase = spi_block_erase_52_4ba, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_d8_4ba, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_60, + }, { + .eraseblocks = { {32 * 1024 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + /* TODO: security register and SBLK/SBULK; MX25L12835F: configuration register */ + .printlock = spi_prettyprint_status_register_bp3_srwd, /* bit6 is quad enable */ + .unlock = spi_disable_blockprotect_bp3_srwd, + .write = spi_chip_write_256, + .read = spi_chip_read, /* Fast read (0x0B) supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Macronix", .name = "MX25U1635E", .bustype = BUS_SPI, .manufacture_id = MACRONIX_ID, -- To view, visit https://review.coreboot.org/19855 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: merged Gerrit-Change-Id: I292e12d92cdf3961b8d47492a1d5679ff1ea21ce Gerrit-Change-Number: 19855 Gerrit-PatchSet: 3 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Keno Fischer Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[staging]: 4BA: Add Micron N25Q/MT25QL 32MB and 64MB 3V SPI flash
by Nico Huber (Code Review) Oct. 15, 2017

Oct. 15, 2017

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/20511 ) Change subject: 4BA: Add Micron N25Q/MT25QL 32MB and 64MB 3V SPI flash ...................................................................... 4BA: Add Micron N25Q/MT25QL 32MB and 64MB 3V SPI flash Use direct 4-byte address commands. Change-Id: I3c130c5ecf4bcc7cf3b34257cb5fc3df523ce08b Signed-off-by: Ed Swierk <eswierk(a)skyportsystems.com> Reviewed-on: https://review.coreboot.org/20511 Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M flashchips.c 1 file changed, 78 insertions(+), 0 deletions(-) Approvals: David Hendricks: Looks good to me, approved build bot (Jenkins): Verified diff --git a/flashchips.c b/flashchips.c index e5cf8a4..742cc6e 100644 --- a/flashchips.c +++ b/flashchips.c @@ -9743,6 +9743,84 @@ }, { + .vendor = "Micron", + .name = "N25Q256..3E/MT25QL256", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q256__3E, + .total_size = 32768, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .read_nbyte = spi_nbyte_read_4ba_direct, + .program_byte = spi_byte_program_4ba_direct, + .program_nbyte = spi_nbyte_program_4ba_direct + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 8192} }, + .block_erase = spi_block_erase_21_4ba_direct, + }, { + .eraseblocks = { {64 * 1024, 512} }, + .block_erase = spi_block_erase_dc_4ba_direct, + }, { + .eraseblocks = { {32768 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { + .vendor = "Micron", + .name = "N25Q512..3E/MT25QL512", /* ..3E/L = 3V, uniform 64KB/4KB blocks/sectors */ + .bustype = BUS_SPI, + .manufacture_id = ST_ID, + .model_id = ST_N25Q512__3E, + .total_size = 65536, + .page_size = 256, + /* supports SFDP */ + /* OTP: 64B total; read 0x4B, write 0x42 */ + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, + .four_bytes_addr_funcs = + { + .read_nbyte = spi_nbyte_read_4ba_direct, + .program_byte = spi_byte_program_4ba_direct, + .program_nbyte = spi_nbyte_program_4ba_direct + }, + .tested = TEST_OK_PREW, + .probe = probe_spi_rdid, + .probe_timing = TIMING_ZERO, + .block_erasers = { + { + .eraseblocks = { {4 * 1024, 16384} }, + .block_erase = spi_block_erase_21_4ba_direct, + }, { + .eraseblocks = { {64 * 1024, 1024} }, + .block_erase = spi_block_erase_dc_4ba_direct, + }, { + .eraseblocks = { {65536 * 1024, 1} }, + .block_erase = spi_block_erase_c7, + } + }, + .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */ + .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */ + .write = spi_chip_write_256, /* Multi I/O supported */ + .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */ + .voltage = {2700, 3600}, + }, + + { .vendor = "MoselVitelic", .name = "V29C51000B", .bustype = BUS_PARALLEL, -- To view, visit https://review.coreboot.org/20511 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: merged Gerrit-Change-Id: I3c130c5ecf4bcc7cf3b34257cb5fc3df523ce08b Gerrit-Change-Number: 20511 Gerrit-PatchSet: 5 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Ed Swierk <eswierk(a)skyportsystems.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in flashrom[staging]: 4BA: Allow disabling 4-byte address mode for SPI flash
by Nico Huber (Code Review) Oct. 15, 2017

Oct. 15, 2017

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/20510 ) Change subject: 4BA: Allow disabling 4-byte address mode for SPI flash ...................................................................... 4BA: Allow disabling 4-byte address mode for SPI flash This allows us to support flash chips in any of the following configurations, regardless of whether the chip powers up in 3-byte or 4-byte address mode. - standard commands with extended address register (*_4ba_ereg) or direct commands (*_4ba_direct) in 3-byte address mode (.set_4ba = spi_exit_4ba_*) - standard commands (*_4ba) or direct commands (*_4ba_direct) in 4-byte address mode (.set_4ba = spi_enter_4ba_*) - direct commands (*_4ba_direct) in either address mode (.set_4ba = NULL) Change-Id: I0b25309d731426940fc50956b744b681ab599e87 Signed-off-by: Ed Swierk <eswierk(a)skyportsystems.com> Reviewed-on: https://review.coreboot.org/20510 Reviewed-by: David Hendricks <david.hendricks(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M flash.h M flashchips.c M flashrom.c 3 files changed, 10 insertions(+), 46 deletions(-) Approvals: David Hendricks: Looks good to me, approved build bot (Jenkins): Verified diff --git a/flash.h b/flash.h index 52f0d49..dfda9d2 100644 --- a/flash.h +++ b/flash.h @@ -119,14 +119,7 @@ #define FEATURE_WRSR_EITHER (FEATURE_WRSR_EWSR | FEATURE_WRSR_WREN) #define FEATURE_OTP (1 << 8) #define FEATURE_QPI (1 << 9) -/* Feature bits used for 4-bytes addressing mode */ -#define FEATURE_4BA_SUPPORT (1 << 10) -#define FEATURE_4BA_ONLY (1 << 11) -#define FEATURE_4BA_EXTENDED_ADDR_REG (1 << 12) -#define FEATURE_4BA_DIRECT_READ (1 << 13) -#define FEATURE_4BA_DIRECT_WRITE (1 << 14) -#define FEATURE_4BA_ALL_ERASERS_DIRECT (1 << 15) -#define FEATURE_4BA_ALL_DIRECT (FEATURE_4BA_DIRECT_READ | FEATURE_4BA_DIRECT_WRITE | FEATURE_4BA_ALL_ERASERS_DIRECT) +#define FEATURE_4BA_SUPPORT (1 << 10) enum test_state { OK = 0, @@ -174,7 +167,7 @@ /* set of function pointers to use in 4-bytes addressing mode */ struct four_bytes_addr_funcs_set { - int (*enter_4ba) (struct flashctx *flash); + int (*set_4ba) (struct flashctx *flash); int (*read_nbyte) (struct flashctx *flash, unsigned int addr, uint8_t *bytes, unsigned int len); int (*program_byte) (struct flashctx *flash, unsigned int addr, const uint8_t databyte); int (*program_nbyte) (struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len); diff --git a/flashchips.c b/flashchips.c index 345ef88..e5cf8a4 100644 --- a/flashchips.c +++ b/flashchips.c @@ -14597,10 +14597,10 @@ /* supports SFDP */ /* OTP: 1024B total, 256B reserved; read 0x48; write 0x42, erase 0x44, read ID 0x4B */ /* FOUR_BYTE_ADDR: supports 4-bytes addressing mode */ - .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT | FEATURE_4BA_DIRECT_READ, + .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA_SUPPORT, .four_bytes_addr_funcs = { - .enter_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ + .set_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */ .read_nbyte = spi_nbyte_read_4ba_direct, /* read directly from any mode, no need to enter 4ba */ .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */ .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */ diff --git a/flashrom.c b/flashrom.c index 8569a49..4f17382 100644 --- a/flashrom.c +++ b/flashrom.c @@ -2223,41 +2223,12 @@ if (flash->chip->unlock) flash->chip->unlock(flash); - /* Switching to 4-Bytes Addressing mode if flash chip supports it */ - if(flash->chip->feature_bits & FEATURE_4BA_SUPPORT) { - /* Do not switch if chip is already in 4-bytes addressing mode */ - if (flash->chip->feature_bits & FEATURE_4BA_ONLY) { - msg_cdbg("Flash chip is already in 4-bytes addressing mode.\n"); - } - /* Do not switch to 4-Bytes Addressing mode if using Extended Address Register */ - else if(flash->chip->feature_bits & FEATURE_4BA_EXTENDED_ADDR_REG) { - msg_cdbg("Using 4-bytes addressing with extended address register.\n"); - } - /* Go to 4-Bytes Addressing mode if selected - operation requires 4-Bytes Addressing mode - (no need if functions are direct-4BA) */ - else if(((read_it || verify_it) - && (!(flash->chip->feature_bits & FEATURE_4BA_DIRECT_READ))) - || ((erase_it || write_it) - && ((flash->chip->feature_bits & FEATURE_4BA_ALL_DIRECT) != FEATURE_4BA_ALL_DIRECT))) { - - if (!flash->chip->four_bytes_addr_funcs.enter_4ba) { - msg_cerr("No function for Enter 4-bytes addressing mode for this flash chip.\n" - "Please report to flashrom(a)flashrom.org\n"); - return 1; - } - - if(flash->chip->four_bytes_addr_funcs.enter_4ba(flash)) { - msg_cerr("Switching to 4-bytes addressing mode failed!\n"); - return 1; - } - - msg_cdbg("Switched to 4-bytes addressing mode.\n"); - } - /* Do not switch to 4-Bytes Addressing mode if all instructions are direct-4BA - or if the flash chip is 4-Bytes Addressing Only and always in 4BA-mode */ - else { - msg_cdbg2("No need to switch to 4-bytes addressing mode.\n"); + /* Enable/disable 4-byte addressing mode if flash chip supports it */ + if ((flash->chip->feature_bits & FEATURE_4BA_SUPPORT) && + flash->chip->four_bytes_addr_funcs.set_4ba) { + if (flash->chip->four_bytes_addr_funcs.set_4ba(flash)) { + msg_cerr("Enabling/disabling 4-byte addressing mode failed!\n"); + return 1; } } -- To view, visit https://review.coreboot.org/20510 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-MessageType: merged Gerrit-Change-Id: I0b25309d731426940fc50956b744b681ab599e87 Gerrit-Change-Number: 20510 Gerrit-PatchSet: 5 Gerrit-Owner: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Ed Swierk <eswierk(a)skyportsystems.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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