Change in flashrom[master]: chipset_enable.c: Validate physmap() return rcrb value

[Edward O'Callaghan (Code Review)]

Edward O'Callaghan has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48225 )

Change subject: chipset_enable.c: Validate physmap() return rcrb value
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chipset_enable.c: Validate physmap() return rcrb value

Validate the physical mapping in enable_flash_silvermont().

Change-Id: Icc5a799a06b3f310d9a191fa5eb99b255b20d79d
Signed-off-by: Edward O'Callaghan 
---
M chipset_enable.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/25/48225/1

diff --git a/chipset_enable.c b/chipset_enable.c
index 5e4a547..7c98798 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -996,6 +996,8 @@

/* Handle GCS (in RCRB) */
    void *rcrb = physmap("BYT RCRB", rcba, 4);
+	if (rcrb == ERROR_PTR)
+		return ERROR_FATAL;
    const enum chipbustype boot_buses = enable_flash_ich_report_gcs(dev, ich_generation, rcrb);
    physunmap(rcrb, 4);

[Sam McNally (Code Review)]

Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/48225 )

Change subject: chipset_enable.c: Validate physmap() return rcrb value
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Patch Set 1: Code-Review+2

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/48225 )

Change subject: chipset_enable.c: Validate physmap() return rcrb value
......................................................................

Patch Set 1: Code-Review+2

[Edward O'Callaghan (Code Review)]

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/48225 )

Change subject: chipset_enable.c: Validate physmap() return rcrb value
......................................................................

chipset_enable.c: Validate physmap() return rcrb value

Validate the physical mapping in enable_flash_silvermont().

Change-Id: Icc5a799a06b3f310d9a191fa5eb99b255b20d79d
Signed-off-by: Edward O'Callaghan 
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48225
Tested-by: build bot (Jenkins) 
Reviewed-by: Sam McNally 
Reviewed-by: Angel Pons 
---
M chipset_enable.c
1 file changed, 2 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved
  Sam McNally: Looks good to me, approved

diff --git a/chipset_enable.c b/chipset_enable.c
index 5e4a547..7c98798 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -996,6 +996,8 @@

/* Handle GCS (in RCRB) */
    void *rcrb = physmap("BYT RCRB", rcba, 4);
+	if (rcrb == ERROR_PTR)
+		return ERROR_FATAL;
    const enum chipbustype boot_buses = enable_flash_ich_report_gcs(dev, ich_generation, rcrb);
    physunmap(rcrb, 4);