Edward O'Callaghan has uploaded this change for review.

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chipset_enable.c: Validate physmap() return rcrb value

Validate the physical mapping in enable_flash_silvermont().

Change-Id: Icc5a799a06b3f310d9a191fa5eb99b255b20d79d
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
---
M chipset_enable.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/flashrom refs/changes/25/48225/1
diff --git a/chipset_enable.c b/chipset_enable.c
index 5e4a547..7c98798 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -996,6 +996,8 @@

/* Handle GCS (in RCRB) */
void *rcrb = physmap("BYT RCRB", rcba, 4);
+ if (rcrb == ERROR_PTR)
+ return ERROR_FATAL;
const enum chipbustype boot_buses = enable_flash_ich_report_gcs(dev, ich_generation, rcrb);
physunmap(rcrb, 4);


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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: Icc5a799a06b3f310d9a191fa5eb99b255b20d79d
Gerrit-Change-Number: 48225
Gerrit-PatchSet: 1
Gerrit-Owner: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-MessageType: newchange