Attention is currently required from: Nico Huber, Edward O'Callaghan, Angel Pons, Sergii Dmytruk. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58570 )
Change subject: spi25_statusreg,flashchips: add SR2 read/write support ......................................................................
Patch Set 19:
(3 comments)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/58570/comment/182e9933_af57a8c5 PS18, Line 6711: FEATURE_WRSR_EXT
The datasheet suggests this won't work, AFAICT, and I guess this path […]
At least according to datasheet rev 2.1 the WRSR (01h) command can write both registers together, I don't remember whether I tested it though.
https://review.coreboot.org/c/flashrom/+/58570/comment/13704bea_0dd976f1 PS18, Line 6872: .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP,
Spurious change?
Done
File spi25_statusreg.c:
https://review.coreboot.org/c/flashrom/+/58570/comment/c95fca3a_704e398c PS17, Line 109: if (spi_read_register(flash, STATUS1, &sr1)) : return 1;
Would it make sense to print an error here?
Done
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Nikolai Artemiev (Code Review)