Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/48384 )
Change subject: chipset_enable.c: Mark Intel H110 as DEP ......................................................................
chipset_enable.c: Mark Intel H110 as DEP
Tested reading, writing and erasing the internal flash chip using an HP 280 G2 SFF mainboard with an Intel H110 PCH. However, since ME-enabled chipsets are marked as DEP instead of OK, this one shall also be.
Change-Id: I5deac6e43a43ee9748aaa7dadae50065613488b1 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/84/48384/1
diff --git a/chipset_enable.c b/chipset_enable.c index 7c98798..308935c 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2022,7 +2022,7 @@ {0x8086, 0x0284, B_S, DEP, "Intel", "Comet Lake U Premium", enable_flash_pch400}, {0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100}, {0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100}, - {0x8086, 0xa143, B_S, NT, "Intel", "H110", enable_flash_pch100}, + {0x8086, 0xa143, B_S, DEP, "Intel", "H110", enable_flash_pch100}, {0x8086, 0xa144, B_S, NT, "Intel", "H170", enable_flash_pch100}, {0x8086, 0xa145, B_S, NT, "Intel", "Z170", enable_flash_pch100}, {0x8086, 0xa146, B_S, NT, "Intel", "Q170", enable_flash_pch100},
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/48384 )
Change subject: chipset_enable.c: Mark Intel H110 as DEP ......................................................................
Patch Set 1: Code-Review+2
Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/48384 )
Change subject: chipset_enable.c: Mark Intel H110 as DEP ......................................................................
Patch Set 1: Code-Review+2
Thanks for the patch Angel.
Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/48384 )
Change subject: chipset_enable.c: Mark Intel H110 as DEP ......................................................................
chipset_enable.c: Mark Intel H110 as DEP
Tested reading, writing and erasing the internal flash chip using an HP 280 G2 SFF mainboard with an Intel H110 PCH. However, since ME-enabled chipsets are marked as DEP instead of OK, this one shall also be.
Change-Id: I5deac6e43a43ee9748aaa7dadae50065613488b1 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/flashrom/+/48384 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Edward O'Callaghan quasisec@chromium.org --- M chipset_enable.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved
diff --git a/chipset_enable.c b/chipset_enable.c index 9205d0e..040b151 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -2022,7 +2022,7 @@ {0x8086, 0x0284, B_S, DEP, "Intel", "Comet Lake U Premium", enable_flash_pch400}, {0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100}, {0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100}, - {0x8086, 0xa143, B_S, NT, "Intel", "H110", enable_flash_pch100}, + {0x8086, 0xa143, B_S, DEP, "Intel", "H110", enable_flash_pch100}, {0x8086, 0xa144, B_S, NT, "Intel", "H170", enable_flash_pch100}, {0x8086, 0xa145, B_S, NT, "Intel", "Z170", enable_flash_pch100}, {0x8086, 0xa146, B_S, NT, "Intel", "Q170", enable_flash_pch100},
-
Angel Pons (Code Review) -
Edward O'Callaghan (Code Review)
-
Nico Huber (Code Review)