Edward O'Callaghan submitted this change.

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Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Edward O'Callaghan: Looks good to me, approved
chipset_enable.c: Mark Intel H110 as DEP

Tested reading, writing and erasing the internal flash chip using an HP
280 G2 SFF mainboard with an Intel H110 PCH. However, since ME-enabled
chipsets are marked as DEP instead of OK, this one shall also be.

Change-Id: I5deac6e43a43ee9748aaa7dadae50065613488b1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/48384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
---
M chipset_enable.c
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/chipset_enable.c b/chipset_enable.c
index 9205d0e..040b151 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2022,7 +2022,7 @@
{0x8086, 0x0284, B_S, DEP, "Intel", "Comet Lake U Premium", enable_flash_pch400},
{0x8086, 0xa141, B_S, NT, "Intel", "Sunrise Point Desktop Sample", enable_flash_pch100},
{0x8086, 0xa142, B_S, NT, "Intel", "Sunrise Point Unknown Sample", enable_flash_pch100},
- {0x8086, 0xa143, B_S, NT, "Intel", "H110", enable_flash_pch100},
+ {0x8086, 0xa143, B_S, DEP, "Intel", "H110", enable_flash_pch100},
{0x8086, 0xa144, B_S, NT, "Intel", "H170", enable_flash_pch100},
{0x8086, 0xa145, B_S, NT, "Intel", "Z170", enable_flash_pch100},
{0x8086, 0xa146, B_S, NT, "Intel", "Q170", enable_flash_pch100},

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Gerrit-Project: flashrom
Gerrit-Branch: master
Gerrit-Change-Id: I5deac6e43a43ee9748aaa7dadae50065613488b1
Gerrit-Change-Number: 48384
Gerrit-PatchSet: 3
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz>
Gerrit-Reviewer: Edward O'Callaghan <quasisec@chromium.org>
Gerrit-Reviewer: Nico Huber <nico.h@gmx.de>
Gerrit-Reviewer: Nikolai Artemiev <nartemiev@google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-MessageType: merged