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Change subject: flashchips: add GD25LB512ME
......................................................................
Patch Set 1:
(3 comments)
Patchset:
PS1:
completed
Commit Message:
https://review.coreboot.org/c/flashrom/+/83795/comment/30e45e63_3c0d7707?us… :
PS1, Line 7: flashchip
> Oh I missed one more thing: this should be `flashchips:` prefix, it's referring to the name of array […]
Done
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/83795/comment/fc24d17d_cc51af81?us… :
PS1, Line 7074: GIGADEVICE_GD25LR512ME
> You need to add a comment in `include/flashchips. […]
Done
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Hello Anastasia Klimchuk, Nikolai Artemiev, Stefan Reinauer,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/83795?usp=email
to look at the new patch set (#2).
Change subject: flashchips: add GD25LB512ME
......................................................................
flashchips: add GD25LB512ME
Added GD25LB512ME to Flashchips.C
added Sames as GD25LB512ME to GIGADEVICE_GD25LR512ME to flashchips.h
GD25LB512ME is 1.8V 512Mbit, Quad enabled when shipped.
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-0…
Tested on ch347 with erase, program, read, and protection.
Change-Id: I04103814f901478098c1a989f4239792b64073ec
Signed-off-by: Victor <vlim(a)gigadevice.com>
---
M flashchips.c
M include/flashchips.h
2 files changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/95/83795/2
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Michał Kopeć has posted comments on this change by Maciej Pijanowski. ( https://review.coreboot.org/c/flashrom/+/83854?usp=email )
Change subject: ichspi: Add RaptorPoint PCH support
......................................................................
Patch Set 3:
(1 comment)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/83854/comment/b4754885_43d2cd6b?us… :
PS3, Line 2193: {0x8086, 0x7a8a, B_S, NT, "Intel", "W685", enable_flash_pch600},
> Michał, I simply ported your patch from: https://github. […]
Same ID in line 2206, presumably W685 was cancelled and the ID was later reused for W790
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Change subject: tree: Retype variable `is_laptop` to enum
......................................................................
Patch Set 3:
(2 comments)
File dmi.c:
https://review.coreboot.org/c/flashrom/+/83834/comment/6808172a_b883e625?us… :
PS3, Line 67: * - 0: in all likelihood not a laptop
: * - 1: in all likelihood a laptop
: * - 2: chassis-type is not specific enough
This need to be updated (there are no numbers anymore, enum instead)
File internal.c:
https://review.coreboot.org/c/flashrom/+/83834/comment/8167aa10_af2e0cdb?us… :
PS3, Line 230: bcfg.is_laptop == YES
Strictly speaking, the previous code is equivalent to bcfg.is_laptop != NO
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Change subject: programmer.h: Introduce new enum for is_laptop
......................................................................
Patch Set 1:
(4 comments)
Patchset:
PS1:
Aarya, I am very happy to see you here again! :) I added few comments , but I will look once more later. Thank you for working on this!
Commit Message:
https://review.coreboot.org/c/flashrom/+/83833/comment/e953034d_8d775421?us… :
PS1, Line 11:
Maybe you can add link to the ticket in the commit message
https://ticket.coreboot.org/issues/416
File include/programmer.h:
https://review.coreboot.org/c/flashrom/+/83833/comment/e7c651f7_e655df51?us… :
PS1, Line 167: enum is_laptop {
I think, it's better to merge two patches together. What do you think?
This enum by itself doesn't do much, but the next patch fully implements its purpose. I would prefer that in the same patch.
https://review.coreboot.org/c/flashrom/+/83833/comment/1dabf5f5_bdfb745b?us… :
PS1, Line 167: enum is_laptop {
: NO,
: YES,
: UNKNOWN,
: };
My first thought was that UNKNOWN would be a more intuitive default value. But then, I understand that this order keep the same order as it was with numbers (0 default was equivalent to NO).
Does anyone has thoughts on better default value, NO or UNKNOWN?
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Change subject: flashchip: add GD25LB512ME
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/83795/comment/0ee16b92_4dae94d3?us… :
PS1, Line 7: flashchip
Oh I missed one more thing: this should be `flashchips:` prefix, it's referring to the name of array and file (and header file).
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Change subject: flashchip: add GD25LB512ME
......................................................................
Patch Set 1:
(2 comments)
Patchset:
PS1:
It seems Jenkins didn't run for some reasons, but this happens sometimes.
I have one comment, and when you fix it and upload new patchset, this should trigger re-run of Jenkins. Hopefully will be all good.
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/83795/comment/959f87cc_6179f4f4?us… :
PS1, Line 7074: GIGADEVICE_GD25LR512ME
You need to add a comment in `include/flashchips.h`, on the line which defines this model id, a comment like:
> Same as GD25LB512ME
When you look into flashchips.h, you will see there are lots of examples of such comments.
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Change subject: flashchips: add support for MX77U51250F chip
......................................................................
Patch Set 3:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/82626/comment/3512f041_391b93b1?us… :
PS3, Line 11648: },
> If you plan to add write-protect support (i.e. […]
Subrata, is it okay if we add this with a later patch?
In the datasheet I have, I don't see a SRP bit and Status register bit 7 is marked reserved. However, by looking other Macronix parts, seems like srp maybe bit 7 and it seems to work. I would like to clarify this point do more testing before I claim WP works.
.reg_bits =
{
.srp = {STATUS1, 7, RW},
.bp = {{STATUS1, 2, RW}, {STATUS1, 3, RW}, {STATUS1, 4, RW}, {STATUS1, 5, RW}},
},
--wp-range=0x00000000,0x04000000 --wp-enable ->
Enabled hardware protection
Activated protection range: start=0x00000000 length=0x04000000 (all)
SUCCESS
--wp-list ->
Available protection ranges:
start=0x00000000 length=0x00000000 (none)
start=0x03ff0000 length=0x00010000 (upper 1/1024)
start=0x03fe0000 length=0x00020000 (upper 1/512)
start=0x03fc0000 length=0x00040000 (upper 1/256)
start=0x03f80000 length=0x00080000 (upper 1/128)
start=0x03f00000 length=0x00100000 (upper 1/64)
start=0x03e00000 length=0x00200000 (upper 1/32)
start=0x03c00000 length=0x00400000 (upper 1/16)
start=0x03800000 length=0x00800000 (upper 1/8)
start=0x03000000 length=0x01000000 (upper 1/4)
start=0x02000000 length=0x02000000 (upper 1/2)
start=0x00000000 length=0x04000000 (all)
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Change subject: ichspi: Add RaptorPoint PCH support
......................................................................
Patch Set 3:
(1 comment)
File chipset_enable.c:
https://review.coreboot.org/c/flashrom/+/83854/comment/f2efd190_4efee848?us… :
PS3, Line 2193: {0x8086, 0x7a8a, B_S, NT, "Intel", "W685", enable_flash_pch600},
Michał, I simply ported your patch from: https://github.com/Dasharo/flashrom/commit/24b8fcfccef31fbb95bc1dd308180f57…
Can you confirm why we removed this?
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Hello Michał Żygowski, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/83854?usp=email
to look at the new patch set (#3).
Change subject: ichspi: Add RaptorPoint PCH support
......................................................................
ichspi: Add RaptorPoint PCH support
TEST=probe flash on Z790 chipset
Change-Id: I13ac52d5400c0e2260e12d605077fc2182c379ef
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
---
M chipset_enable.c
M ich_descriptors.c
M ichspi.c
M include/programmer.h
M util/ich_descriptors_tool/ich_descriptors_tool.c
5 files changed, 37 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/54/83854/3
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