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Change in flashrom[staging]: ichspi: Add support for Intel Skylake
by Nico Huber (Code Review) 24 Mar '17

24 Mar '17

Nico Huber has posted comments on this change. ( https://review.coreboot.org/18962 ) Change subject: ichspi: Add support for Intel Skylake ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/18962/1/ichspi.c File ichspi.c: PS1, Line 947: /* Program offset in flash into FADDR while preserve the reserved bits : * and clearing the 25. address bit which is only useable in hwseq. */ : temp32 = REGREAD32(ICH9_REG_FADDR) & ~0x01FFFFFF; : REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF) | temp32); Probably needs an update. -- To view, visit https://review.coreboot.org/18962 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I0f4565a3c39f5fe3aec4fc8863605cebed1ad4ee Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

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Change in flashrom[staging]: WIP: ich_descriptors: Update for Intel Skylake
by build bot (Jenkins) (Code Review) 24 Mar '17

24 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18973 ) Change subject: WIP: ich_descriptors: Update for Intel Skylake ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/flashrom_gerrit/70/ : FAILURE https://qa.coreboot.org/job/flashrom-customrules/54/ : SUCCESS -- To view, visit https://review.coreboot.org/18973 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Idd60a857d1ecffcb2e437af21134d9de44dcceb8 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in flashrom[staging]: WIP: ich_descriptors: Update for Intel Skylake
by Nico Huber (Code Review) 24 Mar '17

24 Mar '17

Nico Huber has uploaded a new change for review. ( https://review.coreboot.org/18973 ) Change subject: WIP: ich_descriptors: Update for Intel Skylake ...................................................................... WIP: ich_descriptors: Update for Intel Skylake Change-Id: Idd60a857d1ecffcb2e437af21134d9de44dcceb8 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- M ich_descriptors.h 1 file changed, 95 insertions(+), 92 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/18973/1 diff --git a/ich_descriptors.h b/ich_descriptors.h index df4dd76..ab4af1e 100644 --- a/ich_descriptors.h +++ b/ich_descriptors.h @@ -77,7 +77,7 @@ NC :2, /* Number Of Components */ :6, FRBA :8, /* Flash Region Base Address */ - NR :3, /* Number Of Regions */ + NR :3, /* Number Of Regions (reserved from Skylake on) */ :5; }; }; @@ -94,9 +94,10 @@ union { /* 0x0c */ uint32_t FLMAP2; struct { - uint32_t FMSBA :8, /* Flash (G)MCH Strap Base Addr. */ - MSL :8, /* MCH Strap Length */ - :16; + uint32_t FMSBA :8, /* Flash (G)MCH Strap Base Addr. */ + MSL :8, /* MCH Strap Length */ + ICCRIBA :8, /* ICC Reg. Init Base Addr. (new since Sandy Bridge) */ + RIL :8; /* Register Init Length (new since Hawell) */ }; }; }; @@ -116,7 +117,8 @@ * Patsburg: 50 30 5 0:2, 3:5 * Panther Point/7 50 30 5 0:2, 3:5 * Lynx Point/8: 50 30 7 0:3, 4:7 - * Wildcat Point/9: 50 ?? (multi I/O) ? ?:?, ?:? + * Wildcat Point/9: 50 ?? (multi I/O) 7 ?:?, ?:? + * Sunrise Point/100: 48 ?? 7 0:3, 4:7 */ struct { uint32_t :17, @@ -149,106 +151,107 @@ }; }; union { /* 0x08 */ - uint32_t FLPB; /* Flash Partition Boundary Register */ + uint32_t FLPB; /* Flash Partition Boundary Register, until Panther Point/7 */ struct { uint32_t FPBA :13, /* Flash Partition Boundary Addr */ :19; }; - }; -}; - -struct ich_desc_region { - union { - uint32_t FLREGs[5]; + uint32_t FLILL1; /* Flash Invalid Instructions Register, new since Sunrise Point/100 */ struct { - struct { /* FLREG0 Flash Descriptor */ - uint32_t reg0_base :13, - :3, - reg0_limit :13, - :3; - }; - struct { /* FLREG1 BIOS */ - uint32_t reg1_base :13, - :3, - reg1_limit :13, - :3; - }; - struct { /* FLREG2 ME */ - uint32_t reg2_base :13, - :3, - reg2_limit :13, - :3; - }; - struct { /* FLREG3 GbE */ - uint32_t reg3_base :13, - :3, - reg3_limit :13, - :3; - }; - struct { /* FLREG4 Platform */ - uint32_t reg4_base :13, - :3, - reg4_limit :13, - :3; - }; + uint32_t invalid_instr4 :8, + invalid_instr5 :8, + invalid_instr6 :8, + invalid_instr7 :8; }; }; }; -struct ich_desc_master { - union { - uint32_t FLMSTR1; - struct { - uint32_t BIOS_req_ID :16, - BIOS_descr_r :1, - BIOS_BIOS_r :1, - BIOS_ME_r :1, - BIOS_GbE_r :1, - BIOS_plat_r :1, - :3, - BIOS_descr_w :1, - BIOS_BIOS_w :1, - BIOS_ME_w :1, - BIOS_GbE_w :1, - BIOS_plat_w :1, - :3; +#define MAX_NUM_FLREGS 10 /* 16 on unsupported Lewisburg PCH */ +union ich_desc_region { + uint32_t FLREG[MAX_NUM_FLREGS]; /* Flash Descriptor Regions */ + /* + * Number of entries and width differ on various generations: + * + * Chipset/Generation #FLREGs width (bits) + * ICH8 .. Panther Point/7 5 13 + * Lynx Point/8 .. Wildcat Point/9 7 15 + * Sunrise Point/100 .. 10 15 + */ + struct { + uint32_t base :15, + :1, + limit :15, + :1; + } reg[MAX_NUM_FLREGS]; +}; + +union ich_desc_master { + /* For pre-Skylake platforms */ + struct { + union { + uint32_t FLMSTR1; + struct { + uint32_t BIOS_req_ID :16, + BIOS_descr_r :1, + BIOS_BIOS_r :1, + BIOS_ME_r :1, + BIOS_GbE_r :1, + BIOS_plat_r :1, + :3, + BIOS_descr_w :1, + BIOS_BIOS_w :1, + BIOS_ME_w :1, + BIOS_GbE_w :1, + BIOS_plat_w :1, + :3; + }; + }; + union { + uint32_t FLMSTR2; + struct { + uint32_t ME_req_ID :16, + ME_descr_r :1, + ME_BIOS_r :1, + ME_ME_r :1, + ME_GbE_r :1, + ME_plat_r :1, + :3, + ME_descr_w :1, + ME_BIOS_w :1, + ME_ME_w :1, + ME_GbE_w :1, + ME_plat_w :1, + :3; + }; + }; + union { + uint32_t FLMSTR3; + struct { + uint32_t GbE_req_ID :16, + GbE_descr_r :1, + GbE_BIOS_r :1, + GbE_ME_r :1, + GbE_GbE_r :1, + GbE_plat_r :1, + :3, + GbE_descr_w :1, + GbE_BIOS_w :1, + GbE_ME_w :1, + GbE_GbE_w :1, + GbE_plat_w :1, + :3; + }; }; }; + /* From Skylake on */ + #define MAX_NUM_MASTERS 5 /* 6 on unsupported Lewisburg PCH */ union { - uint32_t FLMSTR2; + uint32_t FLMSTR[MAX_NUM_MASTERS]; /* Flash Masters */ struct { - uint32_t ME_req_ID :16, - ME_descr_r :1, - ME_BIOS_r :1, - ME_ME_r :1, - ME_GbE_r :1, - ME_plat_r :1, - :3, - ME_descr_w :1, - ME_BIOS_w :1, - ME_ME_w :1, - ME_GbE_w :1, - ME_plat_w :1, - :3; - }; - }; - union { - uint32_t FLMSTR3; - struct { - uint32_t GbE_req_ID :16, - GbE_descr_r :1, - GbE_BIOS_r :1, - GbE_ME_r :1, - GbE_GbE_r :1, - GbE_plat_r :1, - :3, - GbE_descr_w :1, - GbE_BIOS_w :1, - GbE_ME_w :1, - GbE_GbE_w :1, - GbE_plat_w :1, - :3; - }; + uint32_t :8, + read :12, + write :12; + } master[MAX_NUM_MASTERS]; }; }; -- To view, visit https://review.coreboot.org/18973 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newchange Gerrit-Change-Id: Idd60a857d1ecffcb2e437af21134d9de44dcceb8 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in flashrom[staging]: Free board_vendor and board_model vars before returning
by Patrick Georgi (Code Review) 24 Mar '17

24 Mar '17

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/18207 ) Change subject: Free board_vendor and board_model vars before returning ...................................................................... Patch Set 3: it seems like return 1 is the default except for a few cases. how about initializing ret = 1, and drop the _1 label? -- To view, visit https://review.coreboot.org/18207 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I825f53702803292277b44dcb03fdc49b5dd410a8 Gerrit-PatchSet: 3 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in flashrom[staging]: chipset_enable: Add support for Intel Skylake
by Nico Huber (Code Review) 24 Mar '17

24 Mar '17

Nico Huber has posted comments on this change. ( https://review.coreboot.org/18925 ) Change subject: chipset_enable: Add support for Intel Skylake ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/18925/2/chipset_enable.c File chipset_enable.c: PS2, Line 869: spi_dev Not sure what the contract is here. Are we allowed to free(spi_dev) right after the call? -- To view, visit https://review.coreboot.org/18925 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I000819aff25fbe9764f33df85f040093b82cd948 Gerrit-PatchSet: 2 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Tauner <stefan.tauner(a)gmx.at> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

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Change in flashrom[staging]: fixup! flashrom: Add Skylake platform support
by Nico Huber (Code Review) 23 Mar '17

23 Mar '17

Nico Huber has abandoned this change. ( https://review.coreboot.org/18959 ) Change subject: fixup! flashrom: Add Skylake platform support ...................................................................... Abandoned squashed into new patch -- To view, visit https://review.coreboot.org/18959 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: abandon Gerrit-Change-Id: Ie1d34b3907ab91cce513b0f6b36e1459f91839f6 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins)

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Change in flashrom[staging]: fixup! flashrom: Add Skylake platform support
by Nico Huber (Code Review) 23 Mar '17

23 Mar '17

Nico Huber has abandoned this change. ( https://review.coreboot.org/18958 ) Change subject: fixup! flashrom: Add Skylake platform support ...................................................................... Abandoned squashed into new patch -- To view, visit https://review.coreboot.org/18958 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: abandon Gerrit-Change-Id: I91ef5ad2c055593bd40ecfc17dcd71b8ef27aeee Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins)

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Change in flashrom[staging]: fixup! flashrom: Add Skylake platform support
by Nico Huber (Code Review) 23 Mar '17

23 Mar '17

Nico Huber has abandoned this change. ( https://review.coreboot.org/18957 ) Change subject: fixup! flashrom: Add Skylake platform support ...................................................................... Abandoned squashed into new patch -- To view, visit https://review.coreboot.org/18957 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: abandon Gerrit-Change-Id: Iaae8542a7aa793df98385c6ccd118e1209336047 Gerrit-PatchSet: 1 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins)

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Change in flashrom[staging]: fixup! flashrom: Add Skylake platform support
by Nico Huber (Code Review) 23 Mar '17

23 Mar '17

Nico Huber has abandoned this change. ( https://review.coreboot.org/18940 ) Change subject: fixup! flashrom: Add Skylake platform support ...................................................................... Abandoned squashed into new patch -- To view, visit https://review.coreboot.org/18940 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: abandon Gerrit-Change-Id: Idc57fec7c2007926dafd8b84119d15e86c5e111d Gerrit-PatchSet: 2 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins)

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Change in flashrom[staging]: fixup! flashrom: Add Skylake platform support
by Nico Huber (Code Review) 23 Mar '17

23 Mar '17

Nico Huber has abandoned this change. ( https://review.coreboot.org/18939 ) Change subject: fixup! flashrom: Add Skylake platform support ...................................................................... Abandoned squashed into new patch -- To view, visit https://review.coreboot.org/18939 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: abandon Gerrit-Change-Id: I825b3a6d33bc5dcf41fd58a71c666dfecad32809 Gerrit-PatchSet: 2 Gerrit-Project: flashrom Gerrit-Branch: staging Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins)

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