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Change subject: doc: Convert serprog docs to rst and add to doc directory
......................................................................
Patch Set 1:
(1 comment)
File doc/supported_hw/supported_prog/serprog/overview.rst:
https://review.coreboot.org/c/flashrom/+/82018/comment/45833a41_84e3820e :
PS1, Line 83: See `the github page <https://github.com/dword1511/serprog-stm32vcp#serprog-stm32vcp>`_ for further details, source code etc.
serprog-stm32vcp has been succeeded by stm32-vserprog of the same author
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Change subject: doc: Convert serprog docs to rst and add to doc directory
......................................................................
Patch Set 1: Code-Review+1
(1 comment)
Patchset:
PS1:
Thanks Anastasia for the invitation to review. I looked through the changes and compared them with the wiki and they look good to me.
I would suggest to add some more serprog programmers to the docs but this should happen in a separate change and does not block this change.
The programmers I think which would be interesting to add to the overview are pico-serprog by stacksmashing https://github.com/stacksmashing/pico-serprog and its fork by Riku https://codeberg.org/Riku_V/pico-serprog I could make a change for that ready as I know the projects well. Another notable mention could be the serprog applet of glasgow: https://github.com/GlasgowEmbedded/glasgow/blob/main/software/glasgow/apple…
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Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake
......................................................................
Patch Set 10:
(2 comments)
Patchset:
PS10:
> Hsuan Ting, sorry for the delay, and thank you for the patience. I will review this soon! […]
1. I am afraid that I don't have the access to the SPI programming guide for MTL, either. I consulted with Intel expert Jamie (+cc).
2. I could also find these information for MTL:
[BIOS_BM_RAP](https://edc.intel.com/content/www/de/de/design/publications/14…
[BIOS_BM_WAP](https://edc.intel.com/content/www/de/de/design/publications/14…
3. I confirmed with Jamie that we should start to support these from MTL. Also we haven't met this issue in the other platforms. (These issues should be very critical to ChromeOS, so we should be awared of it if it happens)
PS10:
Hi Jamie:
Thanks for your advice on adding region 9 support for MTL!
I've added you as cc for visibility. Feel free to let me know if you have any thoughts or feedback!
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Change subject: ichspi.c: Add support for region 9 and beyond in Meteor Lake
......................................................................
Patch Set 10:
(1 comment)
Patchset:
PS10:
Hsuan Ting, sorry for the delay, and thank you for the patience. I will review this soon!
But I wanted to ask my usual question: perhaps there is a datasheet which documents this? is it certain that everything beyond Meteor Lake will follow the same configuration?
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Change subject: flashchips: Add support for MXIC MX25L3239E
......................................................................
Patch Set 6:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/81563/comment/169a9945_cede384b :
PS3, Line 9523: 1024B
> I found it is "4K-bit secured OTP" in datasheet, so maybe twice less?
Daniel, I noticed on this patch (and few others that you currently have under review), you left unresolved comments, why? I see that you fixed what the comment was asking, but did not resolve comment as Done.
For the reviewers (me, in this case), resolving comment as Done indicates that you are happy with the latest version of your patch, and reviewers can have another look.
If the comment is not resolved as Done, reviewers are not sure, maybe you are still working on the patch, or testing it, so it's not ready yet.
If this patch is ready (and same for the others), you need to click Done on each comment. And then you need to Reply to the patch, there is a button on the top. Then you click Send, and after that all reviewers get an email, and this is an indication that the patch is ready.
Thank you!
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Change subject: flashrom: Don't throw around "delay 1 second" so lightly
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS1:
I just thought of something and decided to check...
Erase operation verifies the chip straight away after erasing. Without any delay. (Also without respecting the noverify flags, but this we will fix later).
From the chip point of view, erase is almost the same as write, is that correct?
So maybe the erase flow is kind of a "proof-of-concept" for what this patch is doing?
I completely forgot that write and verify can be separated in a manual workflow, so silly of me. This changes the situation, maybe we don't need a special option.
> do you want me to start such a mailing list thread, or were you suggesting I do this?
Brian, you gave me two options which are the same :) But I agree with both of them. I think you should start the thread.
This was your idea, your work and you even went through 10yr old commit messages!
Add a link to the patch in the post, so that anyone who is interested can easily click.
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Change subject: flashrom: Don't throw around "delay 1 second" so lightly
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS1:
> I'd avoid adding a flag - if there really are chips that need a delay, then there is a hardware or s […]
Agree that since a manual workflow can do the same thing, we shouldn't add an option. I think that recommendation should be captured in some kind of changelog so there's "real" documentation of the change, though.
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Change subject: flashrom: Don't throw around "delay 1 second" so lightly
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS1:
> Unfortunately, this hack survived so long it migrated from the CLI to the library. […]
I'd avoid adding a flag - if there really are chips that need a delay, then there is a hardware or software bug that should be addressed with a chip flag or driver fix instead. Adding a flag makes a temporary fix more permanent.
If users need to flash a buggy chip and can't wait for a new flashrom version that fixes it, they can always separate the write & verify operations as Brian suggests.
A mailing list post seems like a good option for trying to recover the history around why the delay was added. If we don't get any response there within say 1 week, then I think we should just land this patch.
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Change subject: <Flashrom SPI NOR>: adding a few new SPI NOR part numbers
......................................................................
Patch Set 1:
(3 comments)
Patchset:
PS1:
> Victor, this is amazing, thank you so much for adding and updating so many chips! […]
+1 Thank you Victor for adding all these chips!
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/81970/comment/90c2f7a2_428f544c :
PS1, Line 6998:
Just a small thing but please ensure that the new entries are indented using tabs only.
https://review.coreboot.org/c/flashrom/+/81970/comment/516b3ced_d414beb0 :
PS1, Line 7278: acts like SEC
Should this be `acts like TB`?
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Change subject: flashrom: Don't throw around "delay 1 second" so lightly
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS1:
> > If nobody knows why this is necessary or how to reproduce, I think it's okay to remove. […]
Unfortunately, this hack survived so long it migrated from the CLI to the library. So a CLI flag won't really provide an escape hatch for all users -- unless you also want to also add a libflashrom flag for it??
I'm still somewhat of a lazy opinion here:
1. I doubt that anything will come of either this CL, nor of a CLI flag that provides a bug-report-escape-hatch for it and
2. the whole `--verify` sequence is trivial enough to emulate on one's own [1]. That gets slightly more complex to implement if people are using environments without basic stuff like a decent shell or tools like `cmp`, or if they're using surgical flags (like `--include`). But it's not that hard.
And the good news is we don't have to try #2 if I'm right about #1 😊
But if you still think we need a flag, I can give it a shot.
And either way, do you want me to start such a mailing list thread, or were you suggesting I do this?
[1] e.g., `flashrom --read /tmp/foo.bin`; `flashrom --write /my/new/image.bin --noverify`; `sleep 1`; `flashrom --read /tmp/bar.bin`; `cmp /tmp/foo.bin /tmp/bar.bin`
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