Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/79354?usp=email )
Change subject: erasure_layout: Remove redundant verifications from `erase_write`
......................................................................
erasure_layout: Remove redundant verifications from `erase_write`
Previously, in the worst-case scenario of erasing region content then
writing new data, three rounds of verification were performed inside of
the `erase_write` function through calls to:
1. `check_erased_range` when erasing with respect to region boundaries
2. `check_erased_range` for the entire erase block after the loop
containing verification 1 completed
3. `verify_range` when all erases/writes were complete
Verification 2 duplicated verification 1 and was orphaned by commit
fa8808595a, which dropped its paired erasefn call but missed this
related step.
Verification 3 duplicated verification which occurs in
`flashrom_image_write` based on `flashctx flags`.
Now, these 2 redundant verifications are removed to improve the
performance of `erase_write`.
This change was tested using the linux_spi programmer to erase and write
to an MT25QL512 chip.
Change-Id: I638835facd9311979c4991cc4ca41a4b9e174bd5
Signed-off-by: Carly Zlabek <carlyzlabek(a)gmail.com>
Signed-off-by: Vincent Fazio <vfazio(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/flashrom/+/79354
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org>
---
M erasure_layout.c
1 file changed, 0 insertions(+), 14 deletions(-)
Approvals:
Vincent Fazio: Looks good to me, but someone else must approve
build bot (Jenkins): Verified
Anastasia Klimchuk: Looks good to me, approved
diff --git a/erasure_layout.c b/erasure_layout.c
index 0c31911..c60305f 100644
--- a/erasure_layout.c
+++ b/erasure_layout.c
@@ -350,13 +350,6 @@
// after erase make it unselected again
erase_layout[i].layout_list[j].selected = false;
msg_cdbg("E(%"PRIx32":%"PRIx32")", start_addr, start_addr + block_len - 1);
- // verify erase
- ret = check_erased_range(flashctx, start_addr, block_len);
- if (ret) {
- msg_cerr("Verifying flash. Erase failed for range %#"PRIx32" : %#"PRIx32", Abort.\n",
- start_addr, start_addr + block_len - 1);
- goto _end;
- }
*all_skipped = false;
}
@@ -385,13 +378,6 @@
*all_skipped = false;
}
- // verify write
- ret = verify_range(flashctx, newcontents + region_start, region_start, region_end - region_start);
- if (ret) {
- msg_cerr("Verifying flash. Write failed for range %#"PRIx32" : %#"PRIx32", Abort.\n",
- region_start, region_end);
- goto _end;
- }
_end:
memcpy(newcontents + region_start, old_start_buf, old_start - region_start);
--
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/79460?usp=email )
Change subject: flashchips: Add write-protect support for GD25LQ255E
......................................................................
Patch Set 4:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/79460/comment/e963d0cc_2b73208f :
PS1, Line 6560: TEST_OK_PREW
> That's a great point! Typically `.reg_bits` are added when someone started using write-protect and tested that it works.
>
> Tyler, maybe you can tell us about it. If you are using write-protect for this chip then you can add the list of commands you were running [successfully] to the commit message. It is important to share the relevant testing info for each commit. Thanks!
@tyler. please follow the commit msg which we did sometime back at https://review.coreboot.org/c/flashrom/+/70549/9//COMMIT_MSG
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Change subject: flashchips: Add write-protect support for GD25LQ255E
......................................................................
Patch Set 4:
(1 comment)
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/79460/comment/593504d5_00c5374c :
PS1, Line 6560: TEST_OK_PREW
> If you are able to test it (e.g. run `flashrom_tester`), please update this.
That's a great point! Typically `.reg_bits` are added when someone started using write-protect and tested that it works.
Tyler, maybe you can tell us about it. If you are using write-protect for this chip then you can add the list of commands you were running [successfully] to the commit message. It is important to share the relevant testing info for each commit. Thanks!
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The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: flashchips: Add GD25LQ255E
......................................................................
Patch Set 9:
(3 comments)
Patchset:
PS9:
Hello Tyler, thank you for the patch! I just have two questions to clarify.
File flashchips.c:
https://review.coreboot.org/c/flashrom/+/79088/comment/a8af90df_8fdf85cb :
PS9, Line 6559: FEATURE_WRSR_EXT2
Also for my education: how do I find out from datasheet that FEATURE_WRSR_EXT2 is supported? Thank you!
https://review.coreboot.org/c/flashrom/+/79088/comment/ea7972ba_4a3a3663 :
PS9, Line 6595: 1695, 1950
Just for my education: the datasheet says `Full voltage range: 1.65-2.0V` but you are using slightly different range. Is there a reason for this?
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Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/79354?usp=email )
Change subject: erasure_layout: Remove redundant verifications from `erase_write`
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS1:
> Anastasia, do you prefer tracking issues in the flashrom redmine, the github mirror, or somewhere el […]
We track issues in flashrom redmine, thank you so much! You are very welcome to add tickets, or comment on existing ones.
Github is only a mirror, and it should be an auto-responder to issues and PRs which tells you to use redmine and gerrit (hopefully the auto-responder still works)
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