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Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59072 )
Change subject: dummyflasher: add SR2 and SR3 emulation harness
......................................................................
Patch Set 34:
(3 comments)
File dummyflasher.c:
https://review.coreboot.org/c/flashrom/+/59072/comment/23f05b79_8161406e
PS16, Line 347: other chips might differ
> Just checking: you are saying "updated comment" but the comment is removed, is it as expected?
It was also moved to the top where `bool emu_wrsr_ext;` is declared.
File dummyflasher.c:
https://review.coreboot.org/c/flashrom/+/59072/comment/f37228af_6bf50d47
PS34, Line 169: assert
> > Maybe separate functions for each status? […]
I would split it into three functions, but it would complicate CB:59074 where WP starts influencing RO masks for all status registers. So I've done it differently: renamed the function to accept any register and made it print a warning on unhandled input and then return 0.
File flashrom.8.tmpl:
https://review.coreboot.org/c/flashrom/+/59072/comment/52f9a378_dd8b5197
PS34, Line 817: is a hexadecimal value of up to 24 bits. For example, 0x332211 assigns 0x11 to
: SR1, 0x22 to SR2 and 0x33 to SR3. Shorter value is padded to 24 bits with
: zeroes on the left. See datasheet for chosen chip for details about the
: registers content.
> Based on this , it would be great to have 3 test scenarios listed in commit message, 3 times `flashr […]
Done
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Hello build bot (Jenkins), Nico Huber, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Nikolai Artemiev,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#35).
Change subject: dummyflasher: enforce write protection for W25Q128FV
......................................................................
dummyflasher: enforce write protection for W25Q128FV
Start taking bits related to write protection into account.
Also add "hwwp" parameter for dummy programmer that sets state of WP
pin (not inverted value).
TEST=use command-line interface to run WP-related commands
dummyflasher doesn't store state of the chip between runs and flashrom
allows running only one command, so testing WP in this way is limited.
However, WP options can be combined with other operations and are
executed prior to them, so certain scenarios can be checked.
List possible ranges:
flashrom -p dummy:emulate=W25Q128FV,hwwp=yes --wp-list
Set a particular range and check status is correct:
flashrom -p dummy:emulate=W25Q128FV,hwwp=yes \
--wp-enable \
--wp-range=0x00100000,0x00f00000 \
--wp-status
Enable write protection and try erasing/writing (erasing here):
# this fails
flashrom -p dummy:emulate=W25Q128FV,hwwp=yes \
--wp-range=0,0x00c00000 \
--wp-enable \
--erase
Write protecting empty range has no effect:
# this succeeds
flashrom -p dummy:emulate=W25Q128FV,hwwp=yes \
--wp-range=0,0 \
--wp-enable \
--erase
Disabling WP is possible if hwwp is off:
# this fails
flashrom -p dummy:emulate=W25Q128FV,spi_status=0x80,hwwp=yes \
--wp-disable
# this succeeds
flashrom -p dummy:emulate=W25Q128FV,spi_status=0x80,hwwp=no \
--wp-disable
Change-Id: I9fd1417f941186391bd213bd355530143c8f04a0
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
M flashrom.8.tmpl
2 files changed, 157 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/74/59074/35
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Hello build bot (Jenkins), Nico Huber, Thomas Heijligen, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Nikolai Artemiev,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59073
to look at the new patch set (#35).
Change subject: dummyflasher: emulate SR2 and SR3 for W25Q128FV
......................................................................
dummyflasher: emulate SR2 and SR3 for W25Q128FV
Enable emulation of SR2 and SR3 for W25Q128FV and provide logic for
updating them (masks of read-only bits that can't be set from outside).
TEST=check how input value affects status registers of emulated chip
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x12 |
grep -A3 'Initial status registers'
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x1234 |
grep -A3 'Initial status registers'
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x123456 |
grep -A3 'Initial status registers'
Change-Id: I79f9b4a0b604663d3288ad70dcbe3ea4075dede5
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
1 file changed, 25 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/73/59073/35
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Hello build bot (Jenkins), Nico Huber, Thomas Heijligen, Edward O'Callaghan, Angel Pons, Anastasia Klimchuk, Nikolai Artemiev,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/flashrom/+/59072
to look at the new patch set (#35).
Change subject: dummyflasher: add SR2 and SR3 emulation harness
......................................................................
dummyflasher: add SR2 and SR3 emulation harness
Prepare everything for emulating SR2 and SR3 for chips that have it.
This is needed for accessing SRP1 and WPS bits which are involved in
write protection. The emulated register doesn't affect anything yet
and will be tested by write-protection tests.
TEST=check how input value affects status registers of emulated chip
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x12 |
grep 'Initial status register'
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x1234 |
grep 'Initial status register'
flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x123456 |
grep 'Initial status register'
Mind that at this point there are no chips that emulate more than one
status register.
Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59
Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com>
---
M dummyflasher.c
M flashrom.8.tmpl
2 files changed, 113 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/72/59072/35
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Hello Felix Singer, build bot (Jenkins), Nico Huber, Michael Niewöhner, Sergii Dmytruk,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#30).
Change subject: ite_ecfw: Implement support for flashing ITE ECs found on TUXEDO laptops
......................................................................
ite_ecfw: Implement support for flashing ITE ECs found on TUXEDO laptops
Add a new programmer supporting ITE Embedded Controllers found on
TUXEDO laptops. Tested on TUXEDO InfinityBook S 14 Gen6 and 15 Gen6
with EC firmware updates from IBV, EC versions 1.07.02TR1 and
1.07.04TR4.
Example standard command to update EC firmware on a TUXEDO laptop:
"flashrom -p ite_ec:romsize=128K,autoload=disable -w eL14MU02.TR1"
Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com>
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Change-Id: I0e42260155ffea38a6f60790871cd8da7b657031
---
M Makefile
M flashrom.8.tmpl
M it87spi.c
A ite_ecfw.c
A ite_ecfw.h
M meson.build
M meson_options.txt
M programmer.h
M programmer_table.c
9 files changed, 1,126 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/flashrom refs/changes/15/55715/30
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Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59072 )
Change subject: dummyflasher: add SR2 and SR3 emulation harness
......................................................................
Patch Set 34:
(1 comment)
File dummyflasher.c:
https://review.coreboot.org/c/flashrom/+/59072/comment/579617fd_8a3b07d9
PS34, Line 169: assert
> Maybe separate functions for each status?
+1
There's nothing wrong with the way assert() is used here. It just documents
what this function should be called with.
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Change subject: dummyflasher: add SR2 and SR3 emulation harness
......................................................................
Patch Set 34:
(1 comment)
File dummyflasher.c:
https://review.coreboot.org/c/flashrom/+/59072/comment/ea42ad4b_27fae95e
PS34, Line 169: assert
> So this is a pure function with domain of { STATUS1, STATUS2, STATUS3 }, which is mapped to { SPI_SR […]
The next commit adds functionality to this for a selected chip. So the result is either the bit mask from the chip or {SPI_SR_WIP, 0, 0}. Until now the number of the register is known at compile time.
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Change subject: dummyflasher: add SR2 and SR3 emulation harness
......................................................................
Patch Set 34:
(1 comment)
File dummyflasher.c:
https://review.coreboot.org/c/flashrom/+/59072/comment/37f42f81_54b66131
PS34, Line 169: assert
> Sorry, I haven't read your follow up before this comment. […]
So this is a pure function with domain of { STATUS1, STATUS2, STATUS3 }, which is mapped to { SPI_SR_WIP, 0, 0 } respectively. I'd remove the function unless it's necessary to call it with non-constant arguments (i.e. if the value of the `status_reg` parameter isn't always known at compile-time).
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Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59291 )
Change subject: flashrom: Drop read_flash_to_file() usage
......................................................................
Patch Set 15:
(1 comment)
Patchset:
PS15:
rebased as this has been sitting for awhile.
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