May 2022 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: it85spi.c: Fix some space/tab trivial style issues
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Edward O'Callaghan has submitted this change. ( https://review.coreboot.org/c/flashrom/+/64246 ) Change subject: it85spi.c: Fix some space/tab trivial style issues ...................................................................... it85spi.c: Fix some space/tab trivial style issues Change-Id: I9192461281f9e760644a241148f4c5100f76da98 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/64246 Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-by: Thomas Heijligen <src(a)posteo.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M it85spi.c 1 file changed, 27 insertions(+), 26 deletions(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved diff --git a/it85spi.c b/it85spi.c index 51328a8..aa6f90a 100644 --- a/it85spi.c +++ b/it85spi.c @@ -241,53 +241,54 @@ struct it85spi_data *data = flash->mst->spi.data; it85xx_enter_scratch_rom(data); - /* Exit scratch ROM ONLY when programmer shuts down. Otherwise, the - * temporary flash state may halt the EC. - */ + /* + * Exit scratch ROM ONLY when programmer shuts down. Otherwise, the + * temporary flash state may halt the EC. + */ #ifdef LPC_IO - INDIRECT_A1(data->shm_io_base, (((unsigned long int)data->ce_high) >> 8) & 0xff); - INDIRECT_WRITE(data->shm_io_base, 0xFF); /* Write anything to this address.*/ - INDIRECT_A1(data->shm_io_base, (((unsigned long int)data->ce_low) >> 8) & 0xff); + INDIRECT_A1(data->shm_io_base, (((unsigned long int)data->ce_high) >> 8) & 0xff); + INDIRECT_WRITE(data->shm_io_base, 0xFF); /* Write anything to this address.*/ + INDIRECT_A1(data->shm_io_base, (((unsigned long int)data->ce_low) >> 8) & 0xff); #endif #ifdef LPC_MEMORY - mmio_writeb(0, data->ce_high); + mmio_writeb(0, data->ce_high); #endif - for (i = 0; i < writecnt; ++i) { + for (i = 0; i < writecnt; ++i) { #ifdef LPC_IO - INDIRECT_WRITE(data->shm_io_base, writearr[i]); + INDIRECT_WRITE(data->shm_io_base, writearr[i]); #endif #ifdef LPC_MEMORY - mmio_writeb(writearr[i], data->ce_low); + mmio_writeb(writearr[i], data->ce_low); #endif - } - for (i = 0; i < readcnt; ++i) { + } + for (i = 0; i < readcnt; ++i) { #ifdef LPC_IO - readarr[i] = INDIRECT_READ(data->shm_io_base); + readarr[i] = INDIRECT_READ(data->shm_io_base); #endif #ifdef LPC_MEMORY - readarr[i] = mmio_readb(data->ce_low); + readarr[i] = mmio_readb(data->ce_low); #endif - } + } #ifdef LPC_IO - INDIRECT_A1(data->shm_io_base, (((unsigned long int)data->ce_high) >> 8) & 0xff); - INDIRECT_WRITE(data->shm_io_base, 0xFF); /* Write anything to this address.*/ + INDIRECT_A1(data->shm_io_base, (((unsigned long int)data->ce_high) >> 8) & 0xff); + INDIRECT_WRITE(data->shm_io_base, 0xFF); /* Write anything to this address.*/ #endif #ifdef LPC_MEMORY - mmio_writeb(0, data->ce_high); + mmio_writeb(0, data->ce_high); #endif - return 0; + return 0; } static const struct spi_master spi_master_it85xx = { - .max_data_read = 64, - .max_data_write = 64, - .command = it85xx_spi_send_command, - .multicommand = default_spi_send_multicommand, - .read = default_spi_read, - .write_256 = default_spi_write_256, - .write_aai = default_spi_write_aai, + .max_data_read = 64, + .max_data_write = 64, + .command = it85xx_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = default_spi_read, + .write_256 = default_spi_write_256, + .write_aai = default_spi_write_aai, .shutdown = it85xx_shutdown, }; -- To view, visit https://review.coreboot.org/c/flashrom/+/64246 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9192461281f9e760644a241148f4c5100f76da98 Gerrit-Change-Number: 64246 Gerrit-PatchSet: 6 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in flashrom[master]: dummyflasher: add SR2 and SR3 emulation harness
by Anastasia Klimchuk (Code Review) 12 May '22

12 May '22

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/59072 ) Change subject: dummyflasher: add SR2 and SR3 emulation harness ...................................................................... dummyflasher: add SR2 and SR3 emulation harness Prepare everything for emulating SR2 and SR3 for chips that have it. This is needed for accessing SRP1 and WPS bits which are involved in write protection. The emulated register doesn't affect anything yet and will be tested by write-protection tests. TEST=check how input value affects status registers of emulated chip flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x12 | grep 'Initial status register' flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x1234 | grep 'Initial status register' flashrom -V -p dummy:emulate=W25Q128FV,spi_status=0x123456 | grep 'Initial status register' Mind that at this point there are no chips that emulate more than one status register. Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59 Signed-off-by: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/59072 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-by: Thomas Heijligen <src(a)posteo.de> --- M dummyflasher.c M flashrom.8.tmpl 2 files changed, 112 insertions(+), 15 deletions(-) Approvals: build bot (Jenkins): Verified Thomas Heijligen: Looks good to me, but someone else must approve Anastasia Klimchuk: Looks good to me, approved diff --git a/dummyflasher.c b/dummyflasher.c index 2311576..fe2375f 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <assert.h> #include <string.h> #include <stdlib.h> #include <stdio.h> @@ -40,9 +41,14 @@ enum emu_chip emu_chip; char *emu_persistent_image; unsigned int emu_chip_size; + /* Note: W25Q128FV doesn't change value of SR2 if it's not provided, but + * even its previous generations do, so don't forget to update + * WRSR code on enabling WRSR_EXT for more chips. */ + bool emu_wrsr_ext; int erase_to_zero; int emu_modified; /* is the image modified since reading it? */ - uint8_t emu_status; + uint8_t emu_status[3]; + uint8_t emu_status_len; /* number of emulated status registers */ /* If "freq" parameter is passed in from command line, commands will delay * for this period before returning. */ unsigned long int delay_us; @@ -158,6 +164,15 @@ return; } +static uint8_t get_reg_ro_bit_mask(enum flash_reg reg) +{ + /* Whoever adds a new register must not forget to update this function + or at least shouldn't use it incorrectly. */ + assert(reg == STATUS1 || reg == STATUS2 || reg == STATUS3); + + return reg == STATUS1 ? SPI_SR_WIP : 0; +} + static int emulate_spi_chip_response(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, @@ -165,6 +180,8 @@ struct emu_data *data) { unsigned int offs, i, toread; + uint8_t ro_bits; + bool wrsr_ext; static int unsigned aai_offs; const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44}; const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a}; @@ -194,7 +211,7 @@ } } - if (data->emu_max_aai_size && (data->emu_status & SPI_SR_AAI)) { + if (data->emu_max_aai_size && (data->emu_status[0] & SPI_SR_AAI)) { if (writearr[0] != JEDEC_AAI_WORD_PROGRAM && writearr[0] != JEDEC_WRDI && writearr[0] != JEDEC_RDSR) { @@ -304,21 +321,72 @@ } break; case JEDEC_RDSR: - memset(readarr, data->emu_status, readcnt); + memset(readarr, data->emu_status[0], readcnt); + break; + case JEDEC_RDSR2: + if (data->emu_status_len >= 2) + memset(readarr, data->emu_status[1], readcnt); + break; + case JEDEC_RDSR3: + if (data->emu_status_len >= 3) + memset(readarr, data->emu_status[2], readcnt); break; /* FIXME: this should be chip-specific. */ case JEDEC_EWSR: case JEDEC_WREN: - data->emu_status |= SPI_SR_WEL; + data->emu_status[0] |= SPI_SR_WEL; break; case JEDEC_WRSR: - if (!(data->emu_status & SPI_SR_WEL)) { + if (!(data->emu_status[0] & SPI_SR_WEL)) { msg_perr("WRSR attempted, but WEL is 0!\n"); break; } + + wrsr_ext = (writecnt == 3 && data->emu_wrsr_ext); + /* FIXME: add some reasonable simulation of the busy flag */ - data->emu_status = writearr[1] & ~SPI_SR_WIP; - msg_pdbg2("WRSR wrote 0x%02x.\n", data->emu_status); + + ro_bits = get_reg_ro_bit_mask(STATUS1); + data->emu_status[0] &= ro_bits; + data->emu_status[0] |= writearr[1] & ~ro_bits; + if (wrsr_ext) { + ro_bits = get_reg_ro_bit_mask(STATUS2); + data->emu_status[1] &= ro_bits; + data->emu_status[1] |= writearr[2] & ~ro_bits; + } + + if (wrsr_ext) + msg_pdbg2("WRSR wrote 0x%02x%02x.\n", data->emu_status[1], data->emu_status[0]); + else + msg_pdbg2("WRSR wrote 0x%02x.\n", data->emu_status[0]); + break; + case JEDEC_WRSR2: + if (data->emu_status_len < 2) + break; + if (!(data->emu_status[0] & SPI_SR_WEL)) { + msg_perr("WRSR2 attempted, but WEL is 0!\n"); + break; + } + + ro_bits = get_reg_ro_bit_mask(STATUS2); + data->emu_status[1] &= ro_bits; + data->emu_status[1] |= (writearr[1] & ~ro_bits); + + msg_pdbg2("WRSR2 wrote 0x%02x.\n", data->emu_status[1]); + break; + case JEDEC_WRSR3: + if (data->emu_status_len < 3) + break; + if (!(data->emu_status[0] & SPI_SR_WEL)) { + msg_perr("WRSR3 attempted, but WEL is 0!\n"); + break; + } + + ro_bits = get_reg_ro_bit_mask(STATUS3); + data->emu_status[2] &= ro_bits; + data->emu_status[2] |= (writearr[1] & ~ro_bits); + + msg_pdbg2("WRSR3 wrote 0x%02x.\n", data->emu_status[2]); break; case JEDEC_READ: offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; @@ -367,7 +435,7 @@ case JEDEC_AAI_WORD_PROGRAM: if (!data->emu_max_aai_size) break; - if (!(data->emu_status & SPI_SR_AAI)) { + if (!(data->emu_status[0] & SPI_SR_AAI)) { if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { msg_perr("Initial AAI WORD PROGRAM size too " "short!\n"); @@ -378,7 +446,7 @@ "long!\n"); return 1; } - data->emu_status |= SPI_SR_AAI; + data->emu_status[0] |= SPI_SR_AAI; aai_offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; /* Truncate to emu_chip_size. */ @@ -403,7 +471,7 @@ break; case JEDEC_WRDI: if (data->emu_max_aai_size) - data->emu_status &= ~SPI_SR_AAI; + data->emu_status[0] &= ~SPI_SR_AAI; break; case JEDEC_SE: if (!data->emu_jedec_se_size) @@ -531,7 +599,7 @@ break; } if (writearr[0] != JEDEC_WREN && writearr[0] != JEDEC_EWSR) - data->emu_status &= ~SPI_SR_WEL; + data->emu_status[0] &= ~SPI_SR_WEL; return 0; } @@ -811,6 +879,7 @@ data->emu_chip_size = 128 * 1024; data->emu_max_byteprogram_size = 128; data->emu_max_aai_size = 0; + data->emu_status_len = 1; data->emu_jedec_se_size = 0; data->emu_jedec_be_52_size = 0; data->emu_jedec_be_d8_size = 32 * 1024; @@ -824,6 +893,7 @@ data->emu_chip_size = 512 * 1024; data->emu_max_byteprogram_size = 1; data->emu_max_aai_size = 0; + data->emu_status_len = 1; data->emu_jedec_se_size = 4 * 1024; data->emu_jedec_be_52_size = 32 * 1024; data->emu_jedec_be_d8_size = 0; @@ -837,6 +907,7 @@ data->emu_chip_size = 4 * 1024 * 1024; data->emu_max_byteprogram_size = 1; data->emu_max_aai_size = 2; + data->emu_status_len = 1; data->emu_jedec_se_size = 4 * 1024; data->emu_jedec_be_52_size = 32 * 1024; data->emu_jedec_be_d8_size = 64 * 1024; @@ -850,6 +921,7 @@ data->emu_chip_size = 8 * 1024 * 1024; data->emu_max_byteprogram_size = 256; data->emu_max_aai_size = 0; + data->emu_status_len = 1; data->emu_jedec_se_size = 4 * 1024; data->emu_jedec_be_52_size = 32 * 1024; data->emu_jedec_be_d8_size = 64 * 1024; @@ -863,6 +935,7 @@ data->emu_chip_size = 16 * 1024 * 1024; data->emu_max_byteprogram_size = 256; data->emu_max_aai_size = 0; + data->emu_status_len = 1; data->emu_jedec_se_size = 4 * 1024; data->emu_jedec_be_52_size = 32 * 1024; data->emu_jedec_be_d8_size = 64 * 1024; @@ -884,6 +957,7 @@ data->emu_chip_size = size; data->emu_max_byteprogram_size = 256; data->emu_max_aai_size = 0; + data->emu_status_len = 1; data->emu_jedec_se_size = 4 * 1024; data->emu_jedec_be_52_size = 32 * 1024; data->emu_jedec_be_d8_size = 64 * 1024; @@ -918,8 +992,10 @@ status = extract_programmer_param("spi_status"); if (status) { + unsigned int emu_status; + errno = 0; - data->emu_status = strtoul(status, &endptr, 0); + emu_status = strtoul(status, &endptr, 0); if (errno != 0 || status == endptr) { free(status); msg_perr("Error: initial status register specified, " @@ -927,8 +1003,26 @@ return 1; } free(status); - msg_pdbg("Initial status register is set to 0x%02x.\n", - data->emu_status); + + data->emu_status[0] = emu_status; + data->emu_status[1] = emu_status >> 8; + data->emu_status[2] = emu_status >> 16; + + if (data->emu_status_len == 3) { + msg_pdbg("Initial status registers:\n" + "\tSR1 is set to 0x%02x\n" + "\tSR2 is set to 0x%02x\n" + "\tSR3 is set to 0x%02x\n", + data->emu_status[0], data->emu_status[1], data->emu_status[2]); + } else if (data->emu_status_len == 2) { + msg_pdbg("Initial status registers:\n" + "\tSR1 is set to 0x%02x\n" + "\tSR2 is set to 0x%02x\n", + data->emu_status[0], data->emu_status[1]); + } else { + msg_pdbg("Initial status register is set to 0x%02x.\n", + data->emu_status[0]); + } } data->flashchip_contents = malloc(data->emu_chip_size); diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index 84e0fba..0f7bc97 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -816,7 +816,10 @@ .sp syntax where .B content -is an 8-bit hexadecimal value. +is a hexadecimal value of up to 24 bits. For example, 0x332211 assigns 0x11 to +SR1, 0x22 to SR2 and 0x33 to SR3. Shorter value is padded to 24 bits with +zeroes on the left. See datasheet for chosen chip for details about the +registers content. .SS .BR "nic3com" , " nicrealtek" , " nicnatsemi" , " nicintel", " nicintel_eeprom"\ , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii"\ -- To view, visit https://review.coreboot.org/c/flashrom/+/59072 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I177ae3f068f03380f5b3941d9996a07205672e59 Gerrit-Change-Number: 59072 Gerrit-PatchSet: 38 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in flashrom[master]: meson: use static library for tests
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Attention is currently required from: Felix Singer, Thomas Heijligen, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64031 ) Change subject: meson: use static library for tests ...................................................................... Patch Set 4: Code-Review+1 (1 comment) File tests/tests.c: https://review.coreboot.org/c/flashrom/+/64031/comment/e14e8c69_425db1a2 PS4, Line 23: #include <stdlib.h> Can you split out the more trivial fix of this in tests so the patch is focused on the build system changes Thomas. Thanks again for this work!! -- To view, visit https://review.coreboot.org/c/flashrom/+/64031 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: If10ed70e3bf629a6eb7e2c5bef3318d1e259dadd Gerrit-Change-Number: 64031 Gerrit-PatchSet: 4 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 12 May 2022 02:47:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: build: Remove cli_classic need for internal symbols
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Edward O'Callaghan has abandoned this change. ( https://review.coreboot.org/c/flashrom/+/60074 ) Change subject: build: Remove cli_classic need for internal symbols ...................................................................... Abandoned This was WIP but a more complete solution by Thomas has been provided in https://review.coreboot.org/c/flashrom/+/64030/ -- To view, visit https://review.coreboot.org/c/flashrom/+/60074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ib04293c14f53c8e798c7d3e35483067520668161 Gerrit-Change-Number: 60074 Gerrit-PatchSet: 9 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: abandon

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Change in flashrom[master]: meson: link flashrom binary against static libflashrom
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Attention is currently required from: Thomas Heijligen, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64030 ) Change subject: meson: link flashrom binary against static libflashrom ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/64030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic522610f59e00299ebfa1bd29482ff92120ec52b Gerrit-Change-Number: 64030 Gerrit-PatchSet: 4 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 12 May 2022 02:44:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: meson: link flashrom binary against static libflashrom
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Attention is currently required from: Thomas Heijligen, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64030 ) Change subject: meson: link flashrom binary against static libflashrom ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: You maybe may want to include CB:59291 in the chain for this. CB:60074 was WIP towards this goal but this is more complete obviously. I'll abandon CB:60074 -- To view, visit https://review.coreboot.org/c/flashrom/+/64030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ic522610f59e00299ebfa1bd29482ff92120ec52b Gerrit-Change-Number: 64030 Gerrit-PatchSet: 4 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 12 May 2022 02:44:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: meson: relocate config_print_wiki & config_default_programmer_*
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Attention is currently required from: Thomas Heijligen. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64029 ) Change subject: meson: relocate config_print_wiki & config_default_programmer_* ...................................................................... Patch Set 3: Code-Review+2 (1 comment) File meson.build: https://review.coreboot.org/c/flashrom/+/64029/comment/2a184b0e_f6f0041f PS2, Line 417: cargs += '-DCONFIG_DEFAULT_PROGRAMMER_ARGS="' + config_default_programmer_args + '"' > The C compiler doesn't know the value of default_programmer. […] Anastasia is correct, we do have the use-case of the default programmer and this is typically "internal", I suspect others would have this too somewhere in the world, seems probable. -- To view, visit https://review.coreboot.org/c/flashrom/+/64029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9538b0aee31b294844d4f4ca0396334a81dfb498 Gerrit-Change-Number: 64029 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Comment-Date: Thu, 12 May 2022 02:41:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Comment-In-Reply-To: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-MessageType: comment

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Change in flashrom[master]: flashrom: Drop read_flash_to_file() usage
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Attention is currently required from: Nico Huber, Thomas Heijligen, Paul Menzel. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59291 ) Change subject: flashrom: Drop read_flash_to_file() usage ...................................................................... Patch Set 15: (1 comment) Patchset: PS15: > read_flash_to_file is still mentioned in a comment inside probe_variable_size() at dummyflashrom. […] Resolved, thanks! -- To view, visit https://review.coreboot.org/c/flashrom/+/59291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I4b690b688acf9d5deb46e8642a252a2132ea8c73 Gerrit-Change-Number: 59291 Gerrit-PatchSet: 15 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Daniel Campello <campello(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 12 May 2022 02:36:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Thomas Heijligen <src(a)posteo.de> Gerrit-MessageType: comment

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Change in flashrom[master]: flashrom: Drop read_flash_to_file() usage
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Attention is currently required from: Nico Huber, Paul Menzel, Edward O'Callaghan. Hello build bot (Jenkins), Thomas Heijligen, Angel Pons, Daniel Campello, Anastasia Klimchuk, Nikolai Artemiev, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/flashrom/+/59291 to look at the new patch set (#16). Change subject: flashrom: Drop read_flash_to_file() usage ...................................................................... flashrom: Drop read_flash_to_file() usage Aspire towards a goal of making cli_classic more of just a user of libflashrom than having quasi-parallel paths in flashrom.c This converts remaining read_flash_to_file() usage to the do_read() provider wrapper around libflashrom. BUG=b:208132085 TEST=` sudo ./flashrom -p ft2232_spi:type=232H,divisor=1000 -f -r out -c W25X05 Flashrom output: No EEPROM/flash device found. Force read (-f -r -c) requested, pretending the chip is there: Assuming Winbond flash chip "W25X05" (64 kB, SPI) on ft2232_spi. Please note that forced reads most likely contain garbage. Block protection could not be disabled! Reading flash... done. Data read: xxd out-1khz 00000000: 0000 07ff ffff e000 0000 7fff fffe 0000 ................ 00000010: 0007 ffff ffe0 0000 007f ffff fe00 0000 ................ 00000020: 07ff ffff e000 0000 7fff fffe 0000 0007 ................ 00000030: ffff ffe0 0000 007f ffff fe00 0000 0fff ................ xxd out-100khz 00000000: b6db 6db6 db6d b6db 6db6 db6d b6db 6db6 ..m..m..m..m..m. 00000010: db6d b6db 6db6 db6d b6db 6db6 db6d b6db .m..m..m..m..m.. 00000020: 6db6 db6d b6db 6db6 db24 9249 2492 4924 m..m..m..$.I$.I$ 00000030: 9249 2492 4924 9249 2492 4924 9249 2492 .I$.I$.I$.I$.I$. ` Change-Id: I4b690b688acf9d5deb46e8642a252a2132ea8c73 Signed-off-by: Edward O'Callaghan <quasisec(a)google.com> Tested-by: Nikolai Artemiev <nartemiev(a)google.com> --- M cli_classic.c M dummyflasher.c M flashrom.c M include/flash.h 4 files changed, 3 insertions(+), 44 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/91/59291/16 -- To view, visit https://review.coreboot.org/c/flashrom/+/59291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I4b690b688acf9d5deb46e8642a252a2132ea8c73 Gerrit-Change-Number: 59291 Gerrit-PatchSet: 16 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Daniel Campello <campello(a)chromium.org> Gerrit-Reviewer: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in flashrom[master]: meson: use built-in options for install paths
by Edward O'Callaghan (Code Review) 12 May '22

12 May '22

Attention is currently required from: Felix Singer, Thomas Heijligen, Angel Pons, Anastasia Klimchuk. Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/64028 ) Change subject: meson: use built-in options for install paths ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/64028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I9cb9faf4bdbcfd66098478cc3a260eb3b664a2e6 Gerrit-Change-Number: 64028 Gerrit-PatchSet: 3 Gerrit-Owner: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Comment-Date: Thu, 12 May 2022 01:41:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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