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Change subject: sb600spi.c: Use SPI100 bit mappings
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63422/comment/615b55c0_7c04c78a
PS1, Line 11: Stop using the legacy
: spi100 registers and use the correct ones.
> I tried the changes in Dalboz (Picasso SoC) and it is working as expected. […]
Ran on Cezanne and everything looks good
```
<+> Get_device_name test: Pass
<+> Coreboot_ELOG_sanity test: Pass
<+> Host_is_ChromeOS test: Pass
<+> Toggle_WP test: Pass
<+> Erase_and_Write test: Pass
<+> Fail_to_verify test: Pass
<+> Lock test: Pass
<+> Lock_top_quad test: Pass
<+> Lock_bottom_quad test: Pass
<+> Lock_bottom_half test: Pass
<+> Lock_top_half test: Pass
```
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Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63422 )
Change subject: sb600spi.c: Use SPI100 bit mappings
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63422/comment/838f04d1_18a0f029
PS1, Line 11: Stop using the legacy
: spi100 registers and use the correct ones.
> I verified that these changes work on Cezanne.
I tried the changes in Dalboz (Picasso SoC) and it is working as expected. I ran the entire suite of flashrom_tester and all of them passed there too.
```
<+> Get_device_name test: Pass
<+> Coreboot_ELOG_sanity test: Pass
<+> Host_is_ChromeOS test: Pass
<+> Toggle_WP test: Pass
<+> Erase_and_Write test: Pass
<+> Fail_to_verify test: Pass
<+> Lock test: Pass
<+> Lock_top_quad test: Pass
<+> Lock_bottom_quad test: Pass
<+> Lock_bottom_half test: Pass
<+> Lock_top_half test: Pass
```
Robert,
Can you please run the flashrom_tester in Cezanne as well?
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/56023 )
Change subject: board_enable.c: Add ME unlock function for Clevo laptops
......................................................................
Patch Set 15:
(1 comment)
Patchset:
PS15:
There is another way for unlocking the fd: Press Fn+M, then power on. Not kidding.
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Change subject: Makefile: build shared pci code as part of the programmer
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
I'm not convinced about this. What does it improve?
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Change subject: Makefile: build shared usb code only when needed by programmer
......................................................................
Patch Set 2: Code-Review+2
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Change subject: sb600spi.c: Use SPI100 bit mappings
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/flashrom/+/63422/comment/4ac7d00d_0fd71d1a
PS1, Line 11: Stop using the legacy
: spi100 registers and use the correct ones.
> right now i'm about 95% sure that the new registers were added together with the spi100 controller. […]
I verified that these changes work on Cezanne.
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