Change in flashrom[master]: sb600spi.c: Use SPI100 bit mappings

[Karthik Ramasubramanian (Code Review)]

Attention is currently required from: Robert Zieba, Jon Murphy, Edward O'Callaghan, Felix Held.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/63422 )

Change subject: sb600spi.c: Use SPI100 bit mappings
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Patch Set 1:

(1 comment)

Commit Message:

https://review.coreboot.org/c/flashrom/+/63422/comment/838f04d1_18a0f029 
PS1, Line 11: Stop using the legacy
            : spi100 registers and use the correct ones.
> I verified that these changes work on Cezanne.

I tried the changes in Dalboz (Picasso SoC) and it is working as expected. I ran the entire suite of flashrom_tester and all of them passed there too.

```

<+> Get_device_name test: Pass
  <+> Coreboot_ELOG_sanity test: Pass
  <+> Host_is_ChromeOS test: Pass
  <+> Toggle_WP test: Pass
  <+> Erase_and_Write test: Pass
  <+> Fail_to_verify test: Pass
  <+> Lock test: Pass
  <+> Lock_top_quad test: Pass
  <+> Lock_bottom_quad test: Pass
  <+> Lock_bottom_half test: Pass
  <+> Lock_top_half test: Pass

```

Robert,

Can you please run the flashrom_tester in Cezanne as well?