March 2022 - flashrom-gerrit - mail.coreboot.org

Change in flashrom[master]: Add FTDI FT4233H
by Charles Parent (Code Review) 01 Mar '22

01 Mar '22

Charles Parent has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62480 ) Change subject: Add FTDI FT4233H ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Hello, We develop a PCIe card used for timing applications. The card needs to be flashed using a FTDI FT4233H (is connected to a MT25QU256 EEPROM) It tested flashrom because FT4232H was supported and FT4233H chip is very similar to FT4232H one. This PR adds productId for FT4233H chip. Please let me know if you need more information. Also as MT25QU256 is specified as untested I will gladly send you logs showing that Probe, read, write and erase works like charm using flashrom. Best regards, Charles -- To view, visit https://review.coreboot.org/c/flashrom/+/62480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I73cee8fd2a6613a8fbc26508d99bbe67da2b4f72 Gerrit-Change-Number: 62480 Gerrit-PatchSet: 1 Gerrit-Owner: Charles Parent <cha.parent(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 09:37:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in flashrom[master]: Add FTDI FT4233H
by Charles Parent (Code Review) 01 Mar '22

01 Mar '22

Charles Parent has uploaded this change for review. ( https://review.coreboot.org/c/flashrom/+/62480 ) Change subject: Add FTDI FT4233H ...................................................................... Add FTDI FT4233H Change-Id: I73cee8fd2a6613a8fbc26508d99bbe67da2b4f72 --- M ft2232_spi.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/flashrom refs/changes/80/62480/1 diff --git a/ft2232_spi.c b/ft2232_spi.c index 65326f9..ccd5f4c 100644 --- a/ft2232_spi.c +++ b/ft2232_spi.c @@ -36,6 +36,7 @@ #define FTDI_FT2232H_PID 0x6010 #define FTDI_FT4232H_PID 0x6011 #define FTDI_FT232H_PID 0x6014 +#define FTDI_FT4233H_PID 0x6041 #define TIAO_TUMPA_PID 0x8a98 #define TIAO_TUMPA_LITE_PID 0x8a99 #define AMONTEC_JTAGKEY_PID 0xCFF8 @@ -61,6 +62,7 @@ {FTDI_VID, FTDI_FT2232H_PID, OK, "FTDI", "FT2232H"}, {FTDI_VID, FTDI_FT4232H_PID, OK, "FTDI", "FT4232H"}, {FTDI_VID, FTDI_FT232H_PID, OK, "FTDI", "FT232H"}, + {FTDI_VID, FTDI_FT4233H_PID, OK, "FTDI", "FT4233H"}, {FTDI_VID, TIAO_TUMPA_PID, OK, "TIAO", "USB Multi-Protocol Adapter"}, {FTDI_VID, TIAO_TUMPA_LITE_PID, OK, "TIAO", "USB Multi-Protocol Adapter Lite"}, {FTDI_VID, AMONTEC_JTAGKEY_PID, OK, "Amontec", "JTAGkey"}, @@ -344,6 +346,9 @@ } else if (!strcasecmp(arg, "232H")) { ft2232_type = FTDI_FT232H_PID; channel_count = 1; + } else if (!strcasecmp(arg, "4233H")) { + ft2232_type = FTDI_FT4233H_PID; + channel_count = 4; } else if (!strcasecmp(arg, "jtagkey")) { ft2232_type = AMONTEC_JTAGKEY_PID; channel_count = 2; -- To view, visit https://review.coreboot.org/c/flashrom/+/62480 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I73cee8fd2a6613a8fbc26508d99bbe67da2b4f72 Gerrit-Change-Number: 62480 Gerrit-PatchSet: 1 Gerrit-Owner: Charles Parent <cha.parent(a)gmail.com> Gerrit-MessageType: newchange

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Change in flashrom[master]: ichspi: Add Alder Lake support
by Sam McNally (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Nico Huber, Rizwan Qureshi, Edward O'Callaghan, Angel Pons. Sam McNally has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62251 ) Change subject: ichspi: Add Alder Lake support ...................................................................... Patch Set 12: Code-Review+2 (1 comment) Patchset: PS12: Tested on Nivviks with ADL-N. -- To view, visit https://review.coreboot.org/c/flashrom/+/62251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie66cf519df13f3391c41f5016b16a81ef3dfd4bf Gerrit-Change-Number: 62251 Gerrit-PatchSet: 12 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 07:43:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: writeprotect: add {get,set}_wp_mode()
by Anastasia Klimchuk (Code Review) 01 Mar '22

01 Mar '22

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/58483 ) Change subject: writeprotect: add {get,set}_wp_mode() ...................................................................... writeprotect: add {get,set}_wp_mode() BUG=b:195381327,b:153800563 BRANCH=none TEST=flashrom --wp-{enable,disable,status} Change-Id: I7b68e940f0e1359281806c98e1da119b4caf8405 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58483 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Anastasia Klimchuk <aklm(a)chromium.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Edward O'Callaghan <quasisec(a)chromium.org> --- M libflashrom.h M writeprotect.c 2 files changed, 47 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve Edward O'Callaghan: Looks good to me, approved Anastasia Klimchuk: Looks good to me, approved diff --git a/libflashrom.h b/libflashrom.h index 83a6250..936c9ae 100644 --- a/libflashrom.h +++ b/libflashrom.h @@ -128,7 +128,9 @@ FLASHROM_WP_ERR_READ_FAILED = 3, FLASHROM_WP_ERR_WRITE_FAILED = 4, FLASHROM_WP_ERR_VERIFY_FAILED = 5, - FLASHROM_WP_ERR_RANGE_UNSUPPORTED = 6 + FLASHROM_WP_ERR_RANGE_UNSUPPORTED = 6, + FLASHROM_WP_ERR_MODE_UNSUPPORTED = 7, + FLASHROM_WP_ERR_RANGE_LIST_UNAVAILABLE = 8 }; enum flashrom_wp_mode { diff --git a/writeprotect.c b/writeprotect.c index 82ecd8e..6b3bbcf 100644 --- a/writeprotect.c +++ b/writeprotect.c @@ -348,6 +348,50 @@ return ret; } +/** Get the mode selected by a WP configuration. */ +static int get_wp_mode(enum flashrom_wp_mode *mode, const struct wp_bits *bits) +{ + if (!bits->srp_bit_present) + return FLASHROM_WP_ERR_CHIP_UNSUPPORTED; + + if (bits->srl_bit_present && bits->srl == 1) { + *mode = bits->srp ? FLASHROM_WP_MODE_PERMANENT : + FLASHROM_WP_MODE_POWER_CYCLE; + } else { + *mode = bits->srp ? FLASHROM_WP_MODE_HARDWARE : + FLASHROM_WP_MODE_DISABLED; + } + + return FLASHROM_WP_OK; +} + +/** Modify a wp_bits structure such that it will select a specified protection mode. */ +static int set_wp_mode(struct wp_bits *bits, const enum flashrom_wp_mode mode) +{ + switch (mode) { + case FLASHROM_WP_MODE_DISABLED: + bits->srl = 0; + bits->srp = 0; + return FLASHROM_WP_OK; + + case FLASHROM_WP_MODE_HARDWARE: + bits->srl = 0; + bits->srp = 1; + return FLASHROM_WP_OK; + + case FLASHROM_WP_MODE_POWER_CYCLE: + case FLASHROM_WP_MODE_PERMANENT: + default: + /* + * Don't try to enable power cycle or permanent protection for + * now. Those modes may be possible to activate on some chips, + * but they are usually unavailable by default or require special + * commands to activate. + */ + return FLASHROM_WP_ERR_MODE_UNSUPPORTED; + } +} + static bool chip_supported(struct flashctx *flash) { return (flash->chip != NULL) && (flash->chip->decode_range != NULL); @@ -367,11 +411,8 @@ if (ret == FLASHROM_WP_OK) ret = get_wp_range(&cfg->range, flash, &bits); - /* TODO: implement and get_wp_mode() and call it */ - /* if (ret == FLASHROM_WP_OK) ret = get_wp_mode(&cfg->mode, &bits); - */ return ret; } @@ -394,11 +435,8 @@ ret = write_wp_bits(flash, bits); /* Set protection mode */ - /* TODO: implement set_wp_mode() and use it */ - /* if (ret == FLASHROM_WP_OK) ret = set_wp_mode(&bits, cfg->mode); - */ if (ret == FLASHROM_WP_OK) ret = write_wp_bits(flash, bits); -- To view, visit https://review.coreboot.org/c/flashrom/+/58483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7b68e940f0e1359281806c98e1da119b4caf8405 Gerrit-Change-Number: 58483 Gerrit-PatchSet: 68 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in flashrom[master]: writeprotect: add {get,set}_wp_mode()
by Anastasia Klimchuk (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Angel Pons, Nikolai Artemiev, Sergii Dmytruk. Anastasia Klimchuk has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58483 ) Change subject: writeprotect: add {get,set}_wp_mode() ...................................................................... Patch Set 67: Code-Review+2 (1 comment) File writeprotect.c: https://review.coreboot.org/c/flashrom/+/58483/comment/b0c2c3b7_4a5e08fd PS58, Line 366: } > I agree, the reversed order isn't very readable. […] Ok, I can see a reason to submit this one together with the previous, because it completes WP implementation which can be used from libflashrom. To summarise, there are two follow-ups to do on this first batch of 11 patches: 1) update the wiki page (from CB:58477) 2) and this little refactoring from here. -- To view, visit https://review.coreboot.org/c/flashrom/+/58483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7b68e940f0e1359281806c98e1da119b4caf8405 Gerrit-Change-Number: 58483 Gerrit-PatchSet: 67 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 05:11:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-MessageType: comment

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Change in flashrom[master]: writeprotect: add {get,set}_wp_mode()
by Nikolai Artemiev (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Angel Pons, Sergii Dmytruk. Nikolai Artemiev has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/58483 ) Change subject: writeprotect: add {get,set}_wp_mode() ...................................................................... Patch Set 67: (1 comment) File writeprotect.c: https://review.coreboot.org/c/flashrom/+/58483/comment/e04b3599_ab4f152f PS58, Line 366: } > s/int/enum flashrom_wp_mode I agree, the reversed order isn't very readable. I'll create another patch to change it but leave this patch as-is so it can land with the other patches and complete the core WP implementation. -- To view, visit https://review.coreboot.org/c/flashrom/+/58483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7b68e940f0e1359281806c98e1da119b4caf8405 Gerrit-Change-Number: 58483 Gerrit-PatchSet: 67 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 04:56:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in flashrom[master]: ichspi: Add Alder Lake support
by Subrata Banik (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Sam McNally, Nico Huber, Rizwan Qureshi, Edward O'Callaghan, Angel Pons. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/62251 ) Change subject: ichspi: Add Alder Lake support ...................................................................... Patch Set 12: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/62251 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Ie66cf519df13f3391c41f5016b16a81ef3dfd4bf Gerrit-Change-Number: 62251 Gerrit-PatchSet: 12 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Sam McNally <sammc(a)google.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 04:43:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: pcidev: Move pci_get_dev() logic into canonical place
by Subrata Banik (Code Review) 01 Mar '22

01 Mar '22

Attention is currently required from: Edward O'Callaghan, Angel Pons. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/flashrom/+/59276 ) Change subject: pcidev: Move pci_get_dev() logic into canonical place ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/flashrom/+/59276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id9ce055d5e5d347520ec5002b8c6548e60eaa0a7 Gerrit-Change-Number: 59276 Gerrit-PatchSet: 5 Gerrit-Owner: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Peter Marheine <pmarheine(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Thomas Heijligen <src(a)posteo.de> Gerrit-Attention: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 01 Mar 2022 04:42:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in flashrom[master]: writeprotect: add set_wp_range()
by Anastasia Klimchuk (Code Review) 01 Mar '22

01 Mar '22

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/58482 ) Change subject: writeprotect: add set_wp_range() ...................................................................... writeprotect: add set_wp_range() BUG=b:195381327,b:153800563 BRANCH=none TEST=flashrom --wp-{status,range} Change-Id: I7d26f43fb05c5828b9839bb57a28fa1088dcd9a0 Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58482 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M libflashrom.h M writeprotect.c 2 files changed, 36 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/libflashrom.h b/libflashrom.h index c9138da..83a6250 100644 --- a/libflashrom.h +++ b/libflashrom.h @@ -127,7 +127,8 @@ FLASHROM_WP_ERR_OTHER = 2, FLASHROM_WP_ERR_READ_FAILED = 3, FLASHROM_WP_ERR_WRITE_FAILED = 4, - FLASHROM_WP_ERR_VERIFY_FAILED = 5 + FLASHROM_WP_ERR_VERIFY_FAILED = 5, + FLASHROM_WP_ERR_RANGE_UNSUPPORTED = 6 }; enum flashrom_wp_mode { diff --git a/writeprotect.c b/writeprotect.c index b619a24..82ecd8e 100644 --- a/writeprotect.c +++ b/writeprotect.c @@ -314,6 +314,40 @@ return FLASHROM_WP_OK; } +static bool ranges_equal(struct wp_range a, struct wp_range b) +{ + return (a.start == b.start) && (a.len == b.len); +} + +/* + * Modify the range-related bits in a wp_bits structure so they select a given + * protection range. Bits that control the protection mode are not changed. + */ +static int set_wp_range(struct wp_bits *bits, struct flashctx *flash, const struct wp_range range) +{ + struct wp_range_and_bits *ranges = NULL; + size_t count; + + enum flashrom_wp_result ret = get_ranges_and_wp_bits(flash, *bits, &ranges, &count); + if (ret != FLASHROM_WP_OK) + return ret; + + /* Search for matching range */ + ret = FLASHROM_WP_ERR_RANGE_UNSUPPORTED; + for (size_t i = 0; i < count; i++) { + + if (ranges_equal(ranges[i].range, range)) { + *bits = ranges[i].bits; + ret = 0; + break; + } + } + + free(ranges); + + return ret; +} + static bool chip_supported(struct flashctx *flash) { return (flash->chip != NULL) && (flash->chip->decode_range != NULL); @@ -354,13 +388,10 @@ ret = read_wp_bits(&bits, flash); /* Set protection range */ - /* TODO: implement set_wp_range() and use it */ - /* if (ret == FLASHROM_WP_OK) ret = set_wp_range(&bits, flash, cfg->range); if (ret == FLASHROM_WP_OK) ret = write_wp_bits(flash, bits); - */ /* Set protection mode */ /* TODO: implement set_wp_mode() and use it */ 60 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/flashrom/+/58482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: I7d26f43fb05c5828b9839bb57a28fa1088dcd9a0 Gerrit-Change-Number: 58482 Gerrit-PatchSet: 66 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in flashrom[master]: libflashrom,writeprotect: add flashrom_wp_get_available_ranges()
by Anastasia Klimchuk (Code Review) 01 Mar '22

01 Mar '22

Anastasia Klimchuk has submitted this change. ( https://review.coreboot.org/c/flashrom/+/58481 ) Change subject: libflashrom,writeprotect: add flashrom_wp_get_available_ranges() ...................................................................... libflashrom,writeprotect: add flashrom_wp_get_available_ranges() Generate list of available ranges by enumerating all possible values that range bits (BPx, TB, ...) can take and using the chip's range decoding function to get the range that is selected by each one. BUG=b:195381327,b:153800563 BRANCH=none TEST=flashrom --wp-list Change-Id: Id51f038f03305c8536d80313e52f77d27835f34d Signed-off-by: Nikolai Artemiev <nartemiev(a)google.com> Reviewed-on: https://review.coreboot.org/c/flashrom/+/58481 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M libflashrom.c M libflashrom.h M writeprotect.c M writeprotect.h 4 files changed, 281 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/libflashrom.c b/libflashrom.c index f0b9cfd..f2288fe 100644 --- a/libflashrom.c +++ b/libflashrom.c @@ -747,4 +747,77 @@ return FLASHROM_WP_ERR_OTHER; } +/** + * @brief Get a list of protection ranges supported by the flash chip. + * + * @param[out] ranges Points to a pointer of type struct flashrom_wp_ranges + * that will be set if available ranges are found. Finding + * available ranges may not always be possible, even if the + * chip's protection range can be read or modified. *ranges + * must be freed using @ref flashrom_wp_ranges_free. + * @param[in] flash The flash context used to access the chip. + * @return 0 on success + * >0 on failure + */ +enum flashrom_wp_result flashrom_wp_get_available_ranges(struct flashrom_wp_ranges **list, struct flashrom_flashctx *flash) +{ + /* + * TODO: Call custom implementation if the programmer is opaque, as + * direct WP operations require SPI access. We actually can't implement + * this in linux_mtd right now, but we should adopt a proper generic + * architechure to match the read and write functions anyway. + */ + if (flash->mst->buses_supported & BUS_SPI) + return wp_get_available_ranges(list, flash); + + return FLASHROM_WP_ERR_OTHER; +} + +/** + * @brief Get a number of protection ranges in a range list. + * + * @param[in] ranges The range list to get the count from. + * @return Number of ranges in the list. + */ +size_t flashrom_wp_ranges_get_count(const struct flashrom_wp_ranges *list) +{ + return list->count; +} + +/** + * @brief Get a protection range from a range list. + * + * @param[out] start Points to a size_t to write the range's start to. + * @param[out] len Points to a size_t to write the range's length to. + * @param[in] ranges The range list to get the range from. + * @param[in] index Index of the range to get. + * @return 0 on success + * >0 on failure + */ +enum flashrom_wp_result flashrom_wp_ranges_get_range(size_t *start, size_t *len, const struct flashrom_wp_ranges *list, unsigned int index) +{ + if (index >= list->count) + return FLASHROM_WP_ERR_OTHER; + + *start = list->ranges[index].start; + *len = list->ranges[index].len; + + return 0; +} + +/** + * @brief Free a WP range list. + * + * @param[out] cfg Pointer to the flashrom_wp_ranges to free. + */ +void flashrom_wp_ranges_release(struct flashrom_wp_ranges *list) +{ + if (!list) + return; + + free(list->ranges); + free(list); +} + + /** @} */ /* end flashrom-wp */ diff --git a/libflashrom.h b/libflashrom.h index 6d02d50..c9138da 100644 --- a/libflashrom.h +++ b/libflashrom.h @@ -137,6 +137,7 @@ FLASHROM_WP_MODE_PERMANENT }; struct flashrom_wp_cfg; +struct flashrom_wp_ranges; enum flashrom_wp_result flashrom_wp_cfg_new(struct flashrom_wp_cfg **); void flashrom_wp_cfg_release(struct flashrom_wp_cfg *); @@ -148,4 +149,9 @@ enum flashrom_wp_result flashrom_wp_read_cfg(struct flashrom_wp_cfg *, struct flashrom_flashctx *); enum flashrom_wp_result flashrom_wp_write_cfg(struct flashrom_flashctx *, const struct flashrom_wp_cfg *); +enum flashrom_wp_result flashrom_wp_get_available_ranges(struct flashrom_wp_ranges **, struct flashrom_flashctx *); +size_t flashrom_wp_ranges_get_count(const struct flashrom_wp_ranges *); +enum flashrom_wp_result flashrom_wp_ranges_get_range(size_t *start, size_t *len, const struct flashrom_wp_ranges *, unsigned int index); +void flashrom_wp_ranges_release(struct flashrom_wp_ranges *); + #endif /* !__LIBFLASHROM_H__ */ diff --git a/writeprotect.c b/writeprotect.c index ca9d9ec..b619a24 100644 --- a/writeprotect.c +++ b/writeprotect.c @@ -158,6 +158,162 @@ return FLASHROM_WP_OK; } +/** Write protect bit values and the range they will activate. */ +struct wp_range_and_bits { + struct wp_bits bits; + struct wp_range range; +}; + +/** + * Comparator used for sorting ranges in get_ranges_and_wp_bits(). + * + * Ranges are ordered by these attributes, in decreasing significance: + * (range length, range start, cmp bit, sec bit, tb bit, bp bits) + */ +static int compare_ranges(const void *aa, const void *bb) +{ + const struct wp_range_and_bits + *a = (const struct wp_range_and_bits *)aa, + *b = (const struct wp_range_and_bits *)bb; + + int ord = 0; + + if (ord == 0) + ord = a->range.len - b->range.len; + + if (ord == 0) + ord = a->range.start - b->range.start; + + if (ord == 0) + ord = a->bits.cmp - b->bits.cmp; + + if (ord == 0) + ord = a->bits.sec - b->bits.sec; + + if (ord == 0) + ord = a->bits.tb - b->bits.tb; + + for (int i = a->bits.bp_bit_count - 1; i >= 0; i--) { + if (ord == 0) + ord = a->bits.bp[i] - b->bits.bp[i]; + } + + return ord; +} + +static bool can_write_bit(const struct reg_bit_info bit) +{ + /* + * TODO: check if the programmer supports writing the register that the + * bit is in. For example, some chipsets may only allow SR1 to be + * written. + */ + + return bit.reg != INVALID_REG && bit.writability == RW; +} + +/** + * Enumerate all protection ranges that the chip supports and that are able to + * be activated, given limitations such as OTP bits or programmer-enforced + * restrictions. Returns a list of deduplicated wp_range_and_bits structures. + * + * Allocates a buffer that must be freed by the caller with free(). + */ +static enum flashrom_wp_result get_ranges_and_wp_bits(struct flashctx *flash, struct wp_bits bits, struct wp_range_and_bits **ranges, size_t *count) +{ + const struct reg_bit_map *reg_bits = &flash->chip->reg_bits; + /* + * Create a list of bits that affect the chip's protection range in + * range_bits. Each element is a pointer to a member of the wp_bits + * structure that will be modified. + * + * Some chips have range bits that cannot be changed (e.g. MX25L6473E + * has a one-time programmable TB bit). Rather than enumerating all + * possible values for unwritable bits, just read their values from the + * chip to ensure we only enumerate ranges that are actually available. + */ + uint8_t *range_bits[ARRAY_SIZE(bits.bp) + 1 /* TB */ + 1 /* SEC */ + 1 /* CMP */]; + size_t bit_count = 0; + + for (size_t i = 0; i < ARRAY_SIZE(bits.bp); i++) { + if (can_write_bit(reg_bits->bp[i])) + range_bits[bit_count++] = &bits.bp[i]; + } + + if (can_write_bit(reg_bits->tb)) + range_bits[bit_count++] = &bits.tb; + + if (can_write_bit(reg_bits->sec)) + range_bits[bit_count++] = &bits.sec; + + if (can_write_bit(reg_bits->cmp)) + range_bits[bit_count++] = &bits.cmp; + + /* Allocate output buffer */ + *count = 1 << bit_count; + *ranges = calloc(*count, sizeof(struct wp_range_and_bits)); + + for (size_t range_index = 0; range_index < *count; range_index++) { + /* + * Extract bits from the range index and assign them to members + * of the wp_bits structure. The loop bounds ensure that all + * bit combinations will be enumerated. + */ + for (size_t i = 0; i < bit_count; i++) + *range_bits[i] = (range_index >> i) & 1; + + struct wp_range_and_bits *output = &(*ranges)[range_index]; + + output->bits = bits; + enum flashrom_wp_result ret = get_wp_range(&output->range, flash, &bits); + if (ret != FLASHROM_WP_OK) { + free(*ranges); + return ret; + } + + /* Debug: print range bits and range */ + msg_gspew("Enumerated range: "); + if (bits.cmp_bit_present) + msg_gspew("CMP=%u ", bits.cmp); + if (bits.sec_bit_present) + msg_gspew("SEC=%u ", bits.sec); + if (bits.tb_bit_present) + msg_gspew("TB=%u ", bits.tb); + for (size_t i = 0; i < bits.bp_bit_count; i++) { + size_t j = bits.bp_bit_count - i - 1; + msg_gspew("BP%zu=%u ", j, bits.bp[j]); + } + msg_gspew(" start=0x%08zx length=0x%08zx ", + output->range.start, output->range.len); + } + + /* Sort ranges. Ensures consistency if there are duplicate ranges. */ + qsort(*ranges, *count, sizeof(struct wp_range_and_bits), compare_ranges); + + /* Remove duplicates */ + size_t output_index = 0; + struct wp_range *last_range = NULL; + + for (size_t i = 0; i < *count; i++) { + bool different_to_last = + (last_range == NULL) || + ((*ranges)[i].range.start != last_range->start) || + ((*ranges)[i].range.len != last_range->len); + + if (different_to_last) { + /* Move range to the next free position */ + (*ranges)[output_index] = (*ranges)[i]; + output_index++; + /* Keep track of last non-duplicate range */ + last_range = &(*ranges)[i].range; + } + } + /* Reduce count to only include non-duplicate ranges */ + *count = output_index; + + return FLASHROM_WP_OK; +} + static bool chip_supported(struct flashctx *flash) { return (flash->chip != NULL) && (flash->chip->decode_range != NULL); @@ -218,4 +374,41 @@ return ret; } +enum flashrom_wp_result wp_get_available_ranges(struct flashrom_wp_ranges **list, struct flashrom_flashctx *flash) +{ + struct wp_bits bits; + struct wp_range_and_bits *range_pairs = NULL; + size_t count; + + if (!chip_supported(flash)) + return FLASHROM_WP_ERR_CHIP_UNSUPPORTED; + + enum flashrom_wp_result ret = read_wp_bits(&bits, flash); + if (ret != FLASHROM_WP_OK) + return ret; + + ret = get_ranges_and_wp_bits(flash, bits, &range_pairs, &count); + if (ret != FLASHROM_WP_OK) + return ret; + + *list = calloc(1, sizeof(struct flashrom_wp_ranges)); + struct wp_range *ranges = calloc(count, sizeof(struct wp_range)); + + if (!(*list) || !ranges) { + free(*list); + free(ranges); + ret = FLASHROM_WP_ERR_OTHER; + goto out; + } + (*list)->count = count; + (*list)->ranges = ranges; + + for (size_t i = 0; i < count; i++) + ranges[i] = range_pairs[i].range; + +out: + free(range_pairs); + return ret; +} + /** @} */ /* end flashrom-wp */ diff --git a/writeprotect.h b/writeprotect.h index d54befa..e27403d 100644 --- a/writeprotect.h +++ b/writeprotect.h @@ -37,6 +37,12 @@ struct wp_range range; }; +/* Collection of multiple write protection ranges. */ +struct flashrom_wp_ranges { + struct wp_range *ranges; + size_t count; +}; + /* * Description of a chip's write protection configuration. * @@ -77,4 +83,7 @@ /* Read WP configuration from the chip */ enum flashrom_wp_result wp_read_cfg(struct flashrom_wp_cfg *, struct flashrom_flashctx *); +/* Get a list of protection ranges supported by the chip */ +enum flashrom_wp_result wp_get_available_ranges(struct flashrom_wp_ranges **, struct flashrom_flashctx *); + #endif /* !__WRITEPROTECT_H__ */ 58 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/flashrom/+/58481 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: flashrom Gerrit-Branch: master Gerrit-Change-Id: Id51f038f03305c8536d80313e52f77d27835f34d Gerrit-Change-Number: 58481 Gerrit-PatchSet: 63 Gerrit-Owner: Nikolai Artemiev <nartemiev(a)google.com> Gerrit-Reviewer: Anastasia Klimchuk <aklm(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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flashrom-gerrit March 2022